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tgerlach
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Registered: ‎12-10-2008

EDK 10.1: MGT Protectors at 125 MHz cause Embedded PPC405 design to crash

Hi @all,

 

I'm working on a Embedded PPC405 design for the Virtex4-FX100. I use EDK 10.1. I have a custom-designed PLB, and the goal is to implement Gigabit Ethernet via the RocketIOs (MGTs) by using the XPS_LL_TEMAC. To protect the unused MGTs, I try to use the MGT protector IP.

 

The Embedded PPC405 System consists of:

 

- a PPC405 core

- PLB v46 

- XPS_UARTLITE

- a DCM (to generate 200 MHz, 100 MHz and 125 MHz)

- MPMC v4.03.a (to access the on-board 64MB DDR2 SDRAM)

- the MGT protectors 

- and the other required stuff (JTAG-CTRL, BRAM + BRAM_CTRL,  RESET_BLOCK, ...) 

 

The processor clock frequency is 200 MHz. The bus clock is 100 MHz. Due to the intended application, the MGTs are to be run at 125 MHz.

The XPS_LL_TEMAC isn't included yet, because of the problem described below.

 

Now my problem. When the instantiated MGT protectors are driven at a multiple of 100 MHz (PORT CLK; I tried 100, 200, 300 MHz),  the system works fine. Both BRAM and DDR2 SDRAM can be accessed properly.

However, if using a different clock for them (I tried 50, 125, 150 MHz), both BRAM and DDR2 SDRAM cannot be accessed anymore. In fact, the whole PPC design hangs until resetting. I tried it several times, always cleaning all generated files (and EDK project cache). For testing purposes, I use a JTAG connection and XMD in order to directly access the RAM without any user-written software.

 

I don't understand how the MGT protectors can affect the MPMC in that manner. Does anybody have experience with the MGT protectors?

My guess is that there are some incorrect clocking constraints or something like that.

 

One more thing: the custom-developed PLB is being used in a project of the University of Heidelberg (for ALICE at CERN). My collegues are using the RocketIOs (running at 125 MHz) to transmit detector data via optical fibers. They have also created custom MGT protectors, which are working fine at 125 MHz. Unfortunately, I can't use them in EDK. Just to verify that other clock frequencies are allowed as well. ;)

 

Many thanks for any hint!

 

Kind regards,

Thomas 

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