04-02-2020 08:29 AM
I just added ILA to my design so that I can use ChipScope (I'm using ISE v14.7 with a Spartan-6 design). Everything was fine until I added ILA then I get messages in the .bld file like
INFO:NgdBuild:889 - Pad net 'Inst_BMD_EP_MEM/mcb3_dram_odt' is not connected to
an external port in this design. A new port 'mcb3_dram_odt_x' has been added
and is connected to this signal.
and then when map runs it fails with errors like
ERROR:Place:1073 - Placer was unable to create RPM[IOB_RPMs] for the component
mcb3_dram_reset_n_x of type IOB for the following reason.
The reason for this issue:
Some of the logic associated with this structure is locked. This should cause
the rest of the logic to be locked.A problem was found at site PAD337 where
we must place IOB mcb3_dram_reset_n_x in order to satisfy the relative
placement requirements of this logic. IOB mcb3_dram_reset_n appears to
already be placed there which makes this design unplaceable. The following
components are part of this structure:
BUT I have this in my .ucf file:
NET "mcb3_dram_reset_n" IOSTANDARD = SSTL15_II ; #LVCMOS15 ;
NET "mcb3_dram_reset_n" LOC = "E3" ;
This is the correct location for this pin for the DDR controller IP. Why is a "_x" signal being created when the signal already exists (and yes, this signal is in my design at the top level). I understand why map is complaining because there are two signals at the same pad but nothing in my design does that and it didn't happen until ILA was added to the design.
04-02-2020 08:51 AM