07-15-2008 01:04 AM
Hello every one ,
I want create an interface with DDR2 and FPGA so I have use the MIG for insert a DDR2 in the project but when I compile the project, 2 error display:
Synthesize XST --> OK but warning
Translate --> OK
Map --> 2 Error
ERROR:PhysDesignRules:760 - Incompatible programming for IO standard. IO
ERROR:Pack:1642 - Errors in physical DRC.
If some one has meet a this problem or has an idea I wait your reponse
11-18-2008 12:50 AM
I set the dqs# disable by modifying the signal ext_load_mode_register,of which the value is 0010000000000 ,but the same error still Exists.
I hope the good solution. Thank you !