I'm using vivado v.2018.1 / Clocking wizard 6.0.
I want to make mmcm block, input clock 10MHz, one of output clock 640MHz.
but i got the this warning.
WARNING : clk_out1 output frequencies are out of range for the corresponding buffers. Timing violations may be present.
I ignored this and proceeded. As expected, the timing violation is present.
Any solution of that?