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mjl-0708
Visitor
Visitor
9,658 Views
Registered: ‎05-07-2013

How to check address conflict of True Dual Port RAM on Virtex4 devices?

I generated True Dual Port RAM in CoreGen, and access the DPRAM on two side.

When I write data on one side and read on another side at the same address, and how to check the conflict.

 The IP has no conflict flag.

 

Thanks

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balkris
Xilinx Employee
Xilinx Employee
9,645 Views
Registered: ‎08-01-2008

You can run the simulation and check the  generated warnings. You can also refer Memory Collsion section and Address overlap condition mention in product guide..

Thanks and Regards
Balkrishan
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mjl-0708
Visitor
Visitor
9,641 Views
Registered: ‎05-07-2013

When I simulate, warning appears at when one side write and the other read the same address..

 

 

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balkris
Xilinx Employee
Xilinx Employee
9,635 Views
Registered: ‎08-01-2008

Please refer Collision Behavior section in PG058 page 60

 

Thanks and Regards
Balkrishan
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