How to include floating point IP(adder,multiply....) in my VHDL code?

[ghkdkrtks]

No Block Design!

In Vivado 2109.1.2

How to include floating point IP in my VHDL code?

There is no in Zynq-7000 Libraries Guide and Language Template !

[nathanx · Accepted solution]

In Vivado IP catalog, find the floating point IP, click "customize IP", configure the IP, click "ok" button to generate the IP, find the "*.vho" file in the generated IP folder, copy the content from the *.vho file to your design, which is to instantiate the IP in your design.

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