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briankincaid
Observer
Observer
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Registered: ‎05-16-2018

How to recover DMA S2MM Direct (not S/G) without losing data

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I have a system where I am receiving a datastream across S2MM that I use DMA to forward to memory.  The AXIS datastream does not have a 'TLAST' signal.  The packet size is known by the processor in real time, so it will set up a specific DMA transfer, for example 1024 or 4096 words.

Without TLAST, I expect the DMA to throw an Internal Error (Status bit 4) that I catch when the transfer has completed.  I will then restart the DMA for the next transfer (the incoming data never stops).

I have not found any sequence that will clear the error so I can restart the DMA without going through a Soft Reset (Control bit 2).  

My problem is that the Soft Reset is flushing a large number of samples from the incoming stream, probably ~100.  I cannot tolerate this in my system.  Do you have any suggestions?

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dgisselq
Scholar
Scholar
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Registered: ‎05-21-2015

@briankincaid,

So far, I've only seen two solutions to this problem:

  1. Wrap the Xilinx S2MM DMA in a separate piece of logic that adds TLAST when appropriate
  2. Use a (non-Xilinx) S2MM implementation that doesn't depend upon TLAST.

Dan

View solution in original post

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dgisselq
Scholar
Scholar
634 Views
Registered: ‎05-21-2015

@briankincaid,

So far, I've only seen two solutions to this problem:

  1. Wrap the Xilinx S2MM DMA in a separate piece of logic that adds TLAST when appropriate
  2. Use a (non-Xilinx) S2MM implementation that doesn't depend upon TLAST.

Dan

View solution in original post

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briankincaid
Observer
Observer
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Registered: ‎05-16-2018

Dan, I appreciate your response.  Your website is incredible.

-Brian

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dgisselq
Scholar
Scholar
591 Views
Registered: ‎05-21-2015

Thanks!  Incidentally, I discussed some of the problems with the S2MM core in this article.

Dan

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