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dthirion
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Registered: ‎10-27-2020

Initializing Block Memory Generator IP if instanciated with Generate For

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Hello all,

I'm trying to initialize RAM blocks, built using the Block Memory Generator v8.4, for synthesis.

I know you can initialize them in the IP configurator, with COE files, but as I'm initializing it with a Generate For i statement, I need all generated blocks to have different initialization files.

For simulation, I managed to initialize the RAM by forcing the Parameter "C_LOAD_INIT_FILE" and "C_INIT_FILE_NAME" with a binary file (raw binary, one line per word); I've checked the implementation and it uses readmemh.

I tried doing the same for synthesis, placement, routing and bitstream generation, but my memory isn't initialized (all 0s).

 

Could someone guide me to either make this setup work, or give me more info on how to use UpdateMEM ? As my BRAM is processor-less, I need to create my MMI file manually and I'm a bit lost concerning that.

 

Some info on my implementation:

- My BRAM is 40 bits / 16384 words; I have made a wrapper around the Block Memory Configurator IP using a BD. This wrapper is what I instanciate (My_BRAM

- I instanciate using :

 

genvar i;
generate
    for(i=0; i<2; i=i+1) begin: genblk_My_BRAM
        My_BRAM BRAM_Inst(
            my ports....
        );
end // block: genblk_C64K

 

 

 

Thanks !!

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dthirion
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Registered: ‎10-27-2020

I managed to use updatemem to initialize my memory, here is how I did it (for future reference!)

 

Step 1: Fix position of BRAM elements

You have to fix position of RAMB36; I synthesized and routed my design, then made a search in vivado for BRAMs; wrote down the LOC properties and added in my XDC:

 

 

set_property LOC RAMB36_%LOC% [get_cells top/inst_blk_mem_gen/gnbram.gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[%N%].ram.r/prim_noinit.ram/DEVICE_7SERIES.NO_BMM_INFO.SP.SIMPLE_PRIM36.ram]

 

 

Replace %LOC% with your location and %N% with the instance number of the block.

Step 2: Manually create MMI

Reference for MMI can be found in document UG898 page 166...

The BRAM blocks had a configuration of 5 blocks in width (1 byte per block, for 40 bits, = 5 blocks) and 4 blocks in height (1 block of 1 byte allows for 4096 words, I had total 16384 words = 4 blocks)

The map of the blocks looked like:

1612840
1713951
18141062
19151173

Vertical = words; horizontal = byte.

Each line is a BusBlock and each column is a BitLane; I created my BusBlocks and BitLanes as per specification in the document shown above.

For the bitlanes, I set MSB and LSB correctly (ex for block 16, it's MSB="39" LSB="32"), AddressRange (for 16 again, it would be Begin="0" End="20480", 20480 = 5bytes*16384words/4blocks), set Parity to false (it's not supported by the way), and set the Placement to what I had in my XDC. Repeat that for each block, you should have:

4 BusBlock with each having 5 BitLanes. All the BitLanes in Block0 would have AddressRange 0..20479; in Block1 AddressRange 20480..40959; repeat that for each...

Step 3: Use memupdate program

Located in the bin folder of your vivado install if you don't have it in your path.

You also need a .MEM file; see UG989 page 164 for this... You have to separate by a space each byte (2 hex characters like ff), and start your file with @0000 or whatever your first address is.

 

 

updatemem -force -meminfo ./memory_map.mmi -data ./sram.00.dat.mem -proc bram_0 -bit ./output.bit -out ./output_initialized.bit 

 

 

Replace "bram_0" with what you put in InstPath of your Processor.

You should have your RAM initialized by now!

See attached example of MMI.

View solution in original post

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dthirion
Visitor
Visitor
441 Views
Registered: ‎10-27-2020

I managed to use updatemem to initialize my memory, here is how I did it (for future reference!)

 

Step 1: Fix position of BRAM elements

You have to fix position of RAMB36; I synthesized and routed my design, then made a search in vivado for BRAMs; wrote down the LOC properties and added in my XDC:

 

 

set_property LOC RAMB36_%LOC% [get_cells top/inst_blk_mem_gen/gnbram.gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[%N%].ram.r/prim_noinit.ram/DEVICE_7SERIES.NO_BMM_INFO.SP.SIMPLE_PRIM36.ram]

 

 

Replace %LOC% with your location and %N% with the instance number of the block.

Step 2: Manually create MMI

Reference for MMI can be found in document UG898 page 166...

The BRAM blocks had a configuration of 5 blocks in width (1 byte per block, for 40 bits, = 5 blocks) and 4 blocks in height (1 block of 1 byte allows for 4096 words, I had total 16384 words = 4 blocks)

The map of the blocks looked like:

1612840
1713951
18141062
19151173

Vertical = words; horizontal = byte.

Each line is a BusBlock and each column is a BitLane; I created my BusBlocks and BitLanes as per specification in the document shown above.

For the bitlanes, I set MSB and LSB correctly (ex for block 16, it's MSB="39" LSB="32"), AddressRange (for 16 again, it would be Begin="0" End="20480", 20480 = 5bytes*16384words/4blocks), set Parity to false (it's not supported by the way), and set the Placement to what I had in my XDC. Repeat that for each block, you should have:

4 BusBlock with each having 5 BitLanes. All the BitLanes in Block0 would have AddressRange 0..20479; in Block1 AddressRange 20480..40959; repeat that for each...

Step 3: Use memupdate program

Located in the bin folder of your vivado install if you don't have it in your path.

You also need a .MEM file; see UG989 page 164 for this... You have to separate by a space each byte (2 hex characters like ff), and start your file with @0000 or whatever your first address is.

 

 

updatemem -force -meminfo ./memory_map.mmi -data ./sram.00.dat.mem -proc bram_0 -bit ./output.bit -out ./output_initialized.bit 

 

 

Replace "bram_0" with what you put in InstPath of your Processor.

You should have your RAM initialized by now!

See attached example of MMI.

View solution in original post

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