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AndreasBMadsen
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Registered: ‎10-30-2020

Instantiating Xilinx IPs in VHDL code

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Hi

I have been wondering for a long time if there is a way, in Vivado, to instantiate any Xilinx IP from the IP Catalog directly from a piece of VHDL code. Without ever opening the IP Integrator. I have not been able to find an answer for this question so far.

Thanks in advance.

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bruce_karaffa
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Registered: ‎06-21-2017

When you generate the IP, make it global, not out of context.  Look in the folder for that IP.  You will see a .vho file.  This will give you examples of how to declare the IP component and how to instantiate it in your code.

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bruce_karaffa
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Registered: ‎06-21-2017

When you generate the IP, make it global, not out of context.  Look in the folder for that IP.  You will see a .vho file.  This will give you examples of how to declare the IP component and how to instantiate it in your code.

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AndreasBMadsen
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Registered: ‎10-30-2020

Hi @bruce_karaffa 

Thank you for your answer. What exactly do you mean by "generating the IP"?

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AndreasBMadsen
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Registered: ‎10-30-2020

Never mind. Found out. Thank you for your help.

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