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Registered: ‎10-05-2020

JESD204B start of frame, multiframe values

I am interfacing with an analog devices AD9208.  Initially I used a ZCU102 and AD9208-3000EBZ (and a evaluation HMC7044 board) to test.  I used the register reset on the core via the AXI interface and saw the typical (for my applications thus far) rx_start_of_multiframe and rx_start_of_frame values of 0 and 1 at the appropriate times.

I've now connected a AD9208 to a Kintex Ultrascale device and I'm not using the AXI interface - I simply reset the core (and the PHY - separate) via the rx_reset pin.

I would like to know why given all configurations on both devices the same, why is the rx_start_of_frame (and rx_end_of_frame) not aligned as they were when it was connected via AXI?

Octets per frame          F = 2

Frames per multiframe K = 16

rx_start_of_multiframe 1,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,

rx_start_of_frame         5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,

rx_end_of_multiframe  0,0,0,0,0,0,0,8,0,0,0,0,0,0,0,8,

rx_end_of_frame          a,a,a,a,a,a,a,a,a,a,a,a,a,a,a,a,

from PG066:

rx_start_of_frame[3:0] Out

Frame boundary indication. The position of the first byte in a frame is encoded in the same way as tx_start_of_frame[3:0]. This signal is asserted one cycle before the AXI4-Stream data. The alignment of the very first valid byte is always in byte 0 if the multiframe size is a multiple of 4 and rx_buffer_delay is a multiple of 4.

rx_start_of_multiframe[3:0] Out

Multi-frame boundary indication. The position of the first byteof each multiframe is encoded in the same way as start_of_frame

My multiframe size is 16 but the doc says that it should always be in byte 0 if multiframe size is multiple of 4.  It was in byte 0 using the Zynq board with the AXI interface.  Am I missing something about using the core without an AXI interface?


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