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Observer
972 Views
Registered: ‎01-21-2019

## Moving data between rams with different width

I'm building a project that need to move data from DDR to BRAM with DMA, and when I find that I can configure the data width of BRAM, I have the following questions:

What happens when we move data between rams with different width?

For example, when moving data from 32-bit wide DDR to a block RAM of 64-bit wide, do we lost the higher 32 bits?

And when we move data from a 64-bit BRAM to a 32-bit DDR, how can we fit it in?

1 Solution

Accepted Solutions
Contributor
867 Views
Registered: ‎09-01-2015

I don't know your DMA design but if I reading twice and writing once it would appear as the latter;

0 aaaa_bbbb

1 cccc_0000

Mike

4 Replies
Scholar
963 Views
Registered: ‎08-07-2014

Data should not be lost. There are two ways:

1. You generate the BRAM with 32 bits width.

2. You introduce a FIFO b/w the DDR and BRAM. One side of the FIFO will have 32 bits width and the other will have 64 bits width.

------------FPGA enthusiast------------
Asking for solutions to problems via PM will be ignored.

Contributor
933 Views
Registered: ‎09-01-2015

do a 64b read followed by two 32b writes

OR

do two 32b reads followed by a 64b write

Observer
879 Views
Registered: ‎01-21-2019

Actually, I have to use a larger width. What I want to know is how the data is stored in this case.

For example, when I use DMA to move data from ddr(16 bit for simplicity purpose) to ram(32 bit), what would happen?

In the ddr, data is like:

0        aaaa

1         bbbb

2         cccc

now I ask DMA to move these data to BRAM, would it be like this：

0        0000_aaaaa

1         0000_bbbb

2        0000_cccc

or like this?：

0         aaaa_bbbb

1          cccc_0000

Thanks :)

Contributor
868 Views
Registered: ‎09-01-2015

I don't know your DMA design but if I reading twice and writing once it would appear as the latter;

0 aaaa_bbbb

1 cccc_0000

Mike