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asiradek
Visitor
Visitor
1,039 Views
Registered: ‎06-24-2019

UltraRAM initialization

Hello,

I would like to switch from Artix to Zynq FPGA. The Zynq is using UltraRAMs instead of BRAMs. According the datasheet, these memories cannot be initialized using input data file or using updatemem tool. Is there any other (easy) way how to load the memory content into the FPGA? Similar to bitstream patch flow.

Also, is there any option how to patch bitstream (BRAMs) without Vivado installation (standalone updatemem tool)?

Thank you.

Best regards,

Radek

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pthakare
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Registered: ‎08-08-2017

Hi @asiradek 

Someof the Zynq Ultrascale+MPSoC devices  have both Ultra RAMs and BRAMs.  As URAM intitialization is not supported ,You can use the BRAMs .

Please check the product overview for the device you are using

https://www.xilinx.com/support/documentation/data_sheets/ds891-zynq-ultrascale-plus-overview.pdf

Regarding the last question , unfortunately there is no option.

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asiradek
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Registered: ‎06-24-2019


@pthakare wrote:

Hi @asiradek 

Someof the Zynq Ultrascale+MPSoC devices  have both Ultra RAMs and BRAMs.  As URAM intitialization is not supported ,You can use the BRAMs .

Please check the product overview for the device you are using

https://www.xilinx.com/support/documentation/data_sheets/ds891-zynq-ultrascale-plus-overview.pdf

Regarding the last question , unfortunately there is no option.


Hi @pthakare ,

thank you for your answer. I would like to use Zynq which has only limited count of BRAMs and I need to initialize more memory than is available in BRAMs. Is there any way how to do it?

Is there any other tool which is capable of patching BRAMs in Zynq bitstream and can be used as standalone tool?

Thank you.

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pthakare
Moderator
Moderator
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Registered: ‎08-08-2017

Hi @asiradek 

AsI know, there is no way, being said that , I will reconfirm this internally and get back to you.

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ohitsjustbrian
Visitor
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Registered: ‎10-14-2020

Is there any update on this? I have the same question.

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avrumw
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Registered: ‎01-23-2009

The reason you can't initialize the UltraRAMs is not a tool limitation, it is a hardware limitation.

Initialization of the BRAMs is done via the normal configuration interface. During bitstream loading there is an internal shift register that connects together all initializable storage elements on the FPGA die. This includes:

  • The configuration of the resources in the slice
    • The LUTs, the Flip-Flops, the internal routing (the connections between the LUTs, the carry chain, the wide MUXes, the flip-flops and the LUT outputs)
  • The initialization values of the flip-flops/latches in the slices
  • The configuration of the switching matrixes in the routing channels
  • The configuration other cells (DSPs, MMCMs, PLLs, GTx, IOBs, etc...
  • The initial values of the BRAMs

Since all these things are configurable/initializable, all these elements must be on the configuration scan chain, and must have a bit in the bitstream for each bit of configuration/initialization.

For the UltraRAMs an architectural decision was made that it did not make sense to put them on the initialization scan chain. There are a large number of bits in these RAMs - having them on the scan chain would mean

  • Increasing the size of each cell of the UltraRAM (each bit) to have the scan in/out capability (and the connections between them)
    • Leaving this out makes the UltraRAM smaller per bit, hence allows for larger RAMs on the FPGA
  • Adding one more bit to the bitstream for each bit of each UltraRAM on the die
    • There (by design) lots of bits in the UltraRAMs - having them initializable would have increased the size of the bitstream by a lot, meaning
      • Larger flash required for bitstream
      • Longer configuration time for the FPGA

So UltraRAMs cannot be initialized - there is simply no hardware mechanism for doing so. This was a conscious tradeoff - Xilinx gave us much larger RAMs, but with the restriction that

  • The are not dual clocked (they single clock, dual port RAMs as opposed to the BRAMs which are dual clocked, or true dual port RAMs)
  • They cannot be initialized

If you need a RAM to be initialized during configuration, you cannot use the UltraRAM, you can only use BRAMs. 

Avrum