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Observer
Observer
393 Views
Registered: ‎03-31-2014

Using pre-customized IP with generated output products in IP integrator

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Hi,

In many Xilinx documentations (e.g. UG1198UG939) a lot of emphasis is given to the Managed IP flow and placing all of the generated output products under revision control, so the IPs can be reused in other designs with the same configurations and the compile time can be reduced, as the IPs are already synthesised.

As far as I can see, this approach is only possible, if an IP core is intantiated in an RTL code. Then the designer can add the .xci file as a design file to use the pre-customised IP.

It would be great to use this approach with the IP Integrator. When I add an IP from the IP catalog (xilinx IP or custom IP) to the block design, it is referenced from the  IP catalog (as expected). If I add the pre-customized IP with the .xci file, it is added as another design source to the project, but not in the block design.

Is there a way to add an .xci file to a block design or reference an IP in the block design to an .xci file?

Thanks

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Xilinx Employee
Xilinx Employee
354 Views
Registered: ‎07-16-2019

Hi,

 I'm sorry but you cannot add a pre-customized Xilinx IP to block design. The -reference switch is used to add user RTL which is added to project to the block design. Of course you can create and package IP however. 

I hope this helps!

Ebrahim

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Xilinx Employee
Xilinx Employee
355 Views
Registered: ‎07-16-2019

Hi,

 I'm sorry but you cannot add a pre-customized Xilinx IP to block design. The -reference switch is used to add user RTL which is added to project to the block design. Of course you can create and package IP however. 

I hope this helps!

Ebrahim

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Observer
Observer
319 Views
Registered: ‎03-31-2014

@ebrahimm, Thanks for the reply.

That's what I thought would be the case but wante to check in any case. That means the Managed IP flow is not suitable with block design approach, as the IPs have to be (at least once) re-generated when the project starts.

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