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Visitor alep1111
Visitor
8,537 Views
Registered: ‎12-08-2015

can't change parameter of Block Memory

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I have placed a a peace of RAM generated with the block memory generator  in a vivado block design in vivado 2015.4

When I  try to change the memory size all fields are gray

 

 

bram.jpg
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Xilinx Employee
Xilinx Employee
16,217 Views
Registered: ‎09-20-2012

Re: can't change parameter of Block Memory

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Hi @alep1111

 

If you are planning to connect the BMG IP to AXI BRAM controller IP or local memory bus interface controller then you have to choose the Mode as "BRAM controller".

 

When using “BRAM controller” mode in BMG IP, the width/depth of Port-A/B depends on the address range assigned for AXI BRAM controller and value of data width selected in AXI BRAM controller.

 

You need to change the data width and address range of BRAM controller to change the width and depth of the Block memory generator IP. Let’s say that you have assigned 4k (i.e., 4x1024x8 bits =  32768 bits) address range to the AXI BRAM controller. Now if you choose data width as 32, the depth will be auto selected as 32768/32=1024.

 

Thanks,

Deepika.

Thanks,
Deepika.
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2 Replies
Xilinx Employee
Xilinx Employee
8,531 Views
Registered: ‎07-11-2011

Re: can't change parameter of Block Memory

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@alep1111, I suspect if you have selected BRAM Controller option for Mode, please check in standalone mode.

 

Hope this helps

 

-Vanitha 

 

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Xilinx Employee
Xilinx Employee
16,218 Views
Registered: ‎09-20-2012

Re: can't change parameter of Block Memory

Jump to solution

Hi @alep1111

 

If you are planning to connect the BMG IP to AXI BRAM controller IP or local memory bus interface controller then you have to choose the Mode as "BRAM controller".

 

When using “BRAM controller” mode in BMG IP, the width/depth of Port-A/B depends on the address range assigned for AXI BRAM controller and value of data width selected in AXI BRAM controller.

 

You need to change the data width and address range of BRAM controller to change the width and depth of the Block memory generator IP. Let’s say that you have assigned 4k (i.e., 4x1024x8 bits =  32768 bits) address range to the AXI BRAM controller. Now if you choose data width as 32, the depth will be auto selected as 32768/32=1024.

 

Thanks,

Deepika.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
0 Kudos