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Registered: ‎09-11-2019

vivado添加ip核的问题

板子是zcu102,vivado版本2020.1

我在bd的diagram中用add ip添加了一个ddr4 SDRAM MIG,在source里成功连接到了工程中。但是综合时会报错[Synth 8-439] module 'ddr4_0_0' not found,请问是什么原因呢?

 
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pthakare
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Registered: ‎08-08-2017

 Hi iwbhatt@mail.ustc.edu.cn 

https://forums.xilinx.com/t5/Announcements/Did-you-know-that-we-have-a-Chinese-Language-Forums/td-p/1172814

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