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alexis_jp
Explorer
Explorer
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Registered: ‎09-10-2019

xpm_fifo_axil independent clock "distributed": CDC constraint missing

I use xpm_fifo_axif with this instance:

 

xpm_fifo_axil #(
  .AXI_ADDR_WIDTH         (5),
  .AXI_DATA_WIDTH         (32),
  .CDC_SYNC_STAGES        (3),
  .CLOCKING_MODE          ("independent_clock"),
  .FIFO_DEPTH_RACH        (16),
  .FIFO_DEPTH_RDCH        (16),
  .FIFO_DEPTH_WACH        (16),
  .FIFO_DEPTH_WDCH        (16),
  .FIFO_DEPTH_WRCH        (16),
  .FIFO_MEMORY_TYPE_RACH  ("distributed"),
  .FIFO_MEMORY_TYPE_RDCH  ("distributed"),
  .FIFO_MEMORY_TYPE_WACH  ("distributed"),
  .FIFO_MEMORY_TYPE_WDCH  ("distributed"),
  .FIFO_MEMORY_TYPE_WRCH  ("distributed")
)

 

 

I get lots of huge inter-clocks timing from s_aresetn to m_aclk.

alexis_jp_0-1620860822555.png

s_aresetn is synchronous to s_aclk.

 

Is that a known bug?

 

Same problem with xpm_fifo_axif only when the memory type is distributed.

 

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alexis_jp
Explorer
Explorer
137 Views
Registered: ‎09-10-2019

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alexis_jp
Explorer
Explorer
120 Views
Registered: ‎09-10-2019

And still not solved in 2020.2.

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