By Dale Hitt, Director Strategic Marketing Development at Xilinx

As applications such as smart security, robotics, or autonomous driving rely increasingly on embedded Artificial Intelligence (AI) to improve performance and deliver new user experiences, inference engines hosted on traditional compute platforms can struggle to meet real-world demands within tightening constraints on power, latency, and physical size. They suffer from rigidly defined inferencing precision, bus widths, and memory that cannot be easily adapted to optimize for best speed, efficiency, and silicon area. An adaptable compute platform is needed to meet the demands placed on embedded AI running state-of-the-art convolutional neural networks (CNN).

Looking further ahead, the flexibility to adapt to more advanced neural networks is a prime concern. CNNs that are popular today are being superseded by new state-of-the-art architectures at an accelerating pace. However, traditional SoCs must be designed using knowledge of current neural network architectures, targeting deployment typically about three years in the future, from the time development starts. New types of neural networks such as RNNs or Capsule Networks are likely to render traditional SoCs inefficient and incapable of delivering the performance required to remain competitive.

To continue reading this article visit Electronic Specifier.

By Willard Tu, Xilinx

The technology of “autonomous driving” is building upon specific driver-assistance functions like adaptive cruise control or collision avoidance, temporary supervised auto-pilot, to fully self-driving vehicles capable of completing journeys from beginning to end with no human intervention at all.

The five levels of autonomy (figure 1) defined by the American Society of Automotive Engineers (SAE) help to visualize the increasing extent of machine involvement in driving vehicles of today and – more importantly, perhaps – the future.

Continue reading this article on Embedded Computing Design .

Join us for this free webinar to learn how Xilinx and DiSTI can help you build modern HMIs

Date: November 15th, 2018 | Time: 7:00am PST / 10:00am EST / 16:00 CET

Webinar attendees will also learn:

• A brief overview of the capabilities of Zynq SoCs to support a wide range of HMI and other industrial applications
• About Zynq® UltraScale+™ dedicated GPU support for GL Studio, which enable user interface (UI) developers to build world-class, high fidelity, safety critical 2D and 3D graphics
• How Xilinx SoCs enable on-chip support for analytics, machine learning, and other forms of edge compute to support critical decisions in real-time with lowest latency in parallel to visualization
• Next step on how to enhance the level of reliability, interactivity, and sophistication for both safety critical and non-safety critical HMIs
  
  

Register now to join us for this webinar event!

Join us for this free webinar to learn how to rapidly prototype your embedded designs with Xilinx MicroBlaze processor presets

Date: November 13th, 2018 | Time: 8:00am PST / 11:00am EST / 17:00 CET

Witness how easy it is to build a custom, powerful processing system in Xilinx Devices. Learn about Xilinx’s MicroBlaze™ processor presets that make jump-starting new designs easier than ever! No RTL experience is required with Vivado® IP Integrator tool and 3rd-party IP libraries. You will see how to rapidly prototype virtually any embedded design with external peripherals in only minutes! 

Additionally, learn all of the benefits of building Xilinx embedded processors including real-time deterministic processing and functional safety! 

Register now to join us for this webinar event! 

XDF brought together over 1,100 attendees from 24 countries for 80+ sessions and 40+ exhibitor demos.

If you weren’t able to make it to XDF, we now have content available to view online.

Now Available on Demand

Work through this self-paced tutorial where you will receive an overview of AWS F1 and SDAccel™ with step-by-step instructions on using Amazon EC2 F1 instances to accelerate your applications. In this virtual developer lab, you will connect to an F1 instance, experience F1 acceleration, and develop and optimize F1 applications with SDAccel. Get Started

Embedded Computing Design article by Dale Hitt, Xilinx

Emerging applications for AI will depend on System-on-Chip devices with configurable acceleration to satisfy increasingly tough performance and efficiency demands.

As applications such as smart security, robotics, or autonomous driving rely increasingly on embedded Artificial Intelligence (AI) to improve performance and deliver new user experiences, inference engines hosted on traditional compute platforms can struggle to meet real-world demands within tightening constraints on power, latency, and physical size. They suffer from rigidly defined inferencing precision, bus widths, and memory that cannot be easily adapted to optimize for best speed, efficiency, and silicon area. An adaptable compute platform is needed to meet the demands placed on embedded AI running state-of-the-art convolutional neural networks (CNN). Read article.

Our CEO's Hot Chips keynote is ready for viewing!

Date: September 20, 2018 | Time: 7:00am PDT / 10:00am EST / 16:00 CEST

Join us for the free webinar about SoC-e’s low latency Ethernet switching IP solution for Xilinx devices. The convergence to Ethernet is a reality. Ethernet Switches add the flexibility to dynamically scale. ARM-based multicore processors with scalable Ethernet Switches have exactly the infrastructure that is needed - it's adaptable. Not too big and costly, and not too small to match your application.

Sub-microsecond synchronization, advanced filtering and policing, 10 Gigabit support and frame processing for security in hardware is key. SoC-e's Managed Ethernet Switch (MES) IP is a complete Ethernet switching solution for Xilinx Zynq®-7000 and Zynq® UltraScale+™ MPSoC as well as for Xilinx FPGAs. Its seamless integration in the SoC reduces product dimensions, power dissipation, and system cost.

Webinar attendees will also learn:

• Integrate this IP using Xilinx Vivado software’s graphical interface
• Use the switch configuration software
• Validate and test designs in the Industrial Grade development kits from SoC-e: SMARTzynq and SMARTmpsoc.

Register now to join us for this webinar event!

Xilinx Reveals More Everest Details

By Karl Freund

Xilinx, the market share leader in Field Programmable Gate Arrays (FPGAs), presented five sessions at this week’s HotChips ’18 conference in Cupertino, California. These included CEO Victor Peng’s keynote on the company’s vision for the future of adaptable domain specific computing, new features of its upcoming 7nm Project Everest architecture, and pre-built applications for Deep Learning for Artificial Intelligence on FPGAs.

Read article

Join this free webinar to learn how to drive visual intelligence solutions with Framos' SLVS-EC IP, Sony Imagers, and Xilinx machine vision platforms.

Xilinx, Framos, and Sony have partnered to enable the machine vision market with a solution to keep up with industry demand for higher resolution and bandwidth while simplifying cabling and shrinking footprint.

This free Webinar will provide everything you need to know to get started with Sony’s new SLVS-EC interface standard for 3rd generation Pregius imagers and beyond.

SLVS-EC is a standard that expands Xilinx Any-to-Any connectivity portfolio and amplifies innovation with other Xilinx solutions around machine learning, image processing, and sensor fusion.

Webinar Attendees will also learn:

• Sony Pregius Imager portfolio overview
• Availability and support of Framos IP for 28/20/16nm Xilinx product families
• Xilinx solutions for machine vision, surveillance, and other intelligent vision applications
• Scalability from SLVS-EC v1.2 today to v2.0 in the future

Register now for this exciting Xilinx, Framos, and Sony webinar event on October 18!

In March 2018, Avnet, Xilinx, and 96Boards collaborated to create the ARM-based Ultra96™ development board, featuring the Zynq® UltraScale+™ MPSoC, based on the Linaro 96Boards Consumer Edition specification. The Ultra96 board not only expands Linaro’s 96Boards portfolio offerings in its Consumer Edition class but also provides 96Boards developers with a unique and powerful development board.

So what makes Ultra96 different?

Ultra96 has some similarities to the other offerings in Linaro’s 96Boards portfolio, such as a quad-core A53, GPU, and high-speed RAM. The big difference is in the embedded Programmable Logic that's tightly coupled with the processing system.

What can you create with the programmable logic?

This is where it gets interesting! Custom accelerators that speed code by 10x or even 100x. Deterministic circuitry to keep up with real-time demands. Multiple personality systems that change based on current circumstances. A custom peripheral controller to interface with a device that doesn’t use a common signaling standard. All this with latest “Software-defined” SDx tools from Xilinx that don’t require you to be a Verilog or VHDL expert to create designs.

What will you learn in this live webinar?

Learn how programmable logic can be useful, powerful, and flexible for circuit applications, including:

• Accelerators
• Bus adapters
• Custom peripheral controllers
• Deterministic, real-time responses
• On-chip logic analysis
• Multiple personalities without changing chips
• Security

Please join us and see what you can create with programmable logic!   Register

Avnet and Xilinx would like to see what types of edge AI designs the Hackster community can develop using the new Ultra96™ Development Board. Example edge application categories include, but are not limited to, autonomous vehicles, drones or robots, industrial or home IoT, and consumer electronics.

The Avnet Ultra96 Development Board features a Xilinx Zynq® UltraScale+™ MPSoC, which integrates an Arm multicore, multiprocessing system with the programmable logic that can be used to hardware accelerate compute-intensive tasks. This is critical in producing a real-time response and decision making in systems — as many intelligent systems require.

The top three projects using the Avnet Ultra96 Development Board will be awarded some nifty prizes, such as a top-of-the-line Google Pixelbook! But that’s not all. Any ideas entered before August 27th are also eligible to win a trip to Silicon Valley to attend the 2018 Xilinx Developer Forum on October 1st and 2nd, where they’ ll even have a chance to showcase their completed work.

To help get you started, we’re giving away 30 Ultra96s to the top ideas submitted on or before August 27th.

For more details on the Create Intelligence at the Edge Contest,  check out the official page!

Submissions close on October 15th.

Our biggest developer event, ever.

XDF connects software developers and system designers to the deep expertise of Xilinx engineers, partners, and industry leaders. You will leave the forum with insights and inspiration to tackle your most ambitious designs.

AGENDA

• October 1st: Hands-on developer labs, tutorials and developer workshops
  
  
• October 2nd: CEO keynote, breakout sessions, exhibits, and networking reception

Integrate the RF Signal Chain with our New Kit!

Interested in integrating RF-analog into your SoC design to reduce power and footprint? The new ZCU111 Evaluation Kit, based on the Xilinx Zynq® UltraScale+™ RFSoC, provides you with all the hardware and tools to jumpstart your RF-Class analog designs.

The ZCU111 Evaluation Kit is orderable today and includes:

• XCZU28DR device with 8x8 RF-Analog and Integrated SD-FEC Cores
• Zynq UltraScale+ RFSoC ZCU111 Evaluation Board
• XM500 RFMC balun transformer add-on card
• Filters and cables (SMAs, USB, Ethernet)
• Vivado® Design Suite Node/Device-Locked License
• Access to the Analog-Mixed Signal (AMS) reference design

To learn more and jump start your RF-Class analog design integration, visit the Xilinx ZCU111 Evaluation Kit page.

Victor Peng has a (programmable) logic for Xilinx’s future
By Rex Crum, The Mercury News

Photo credit: Karl Mondon/Bay Area News Group

For Victor Peng, becoming CEO at programmable logic chipmaker Xilinx may have come with a few benefits, but a better parking space wasn’t included.

“We don’t do that around here,” laughed Peng during a meeting in his office at Xilinx’s San Jose headquarters. “That’s not something I would want to instill, either.”

Peng is fairly new to the CEO chair, having taken on his job at Xilinx in late January. That doesn’t mean he was unfamiliar with what Xilinx does, as he joined the company in 2008, and served a stint as chief operating officer before taking over from former Xilinx CEO Moshe Gavrielov under a company succession plan.

Peng faced Wall Street analysts recently and laid out plans for Xilinx to boost its spending this year by 10 percent and put more emphasis on artificial intelligence technologies. Prior to that meeting, he talked about matters such as where Xilinx sees its future growth opportunities and where consumers might encounter the company’s products.

Read the entire article here.

The new open-source book aimed at teaching hardware and software developers how to efficiently program FPGAs using high-level synthesis (HLS) is now available. The book, “Parallel Programming for FPGAs,” by Stephen Neuendorffer, Principal Engineer at Xilinx, together with Ryan Kastner from UCSD and Janarbek Matai from Cognex, is a practical guide for anyone interested in building FPGA systems. It is of particular value to students in advanced undergraduate and graduate courses. But it can also be useful for system designers and embedded programmers already on the job.

This webinar will introduce the foundational concepts motivating the use of Xilinx Zynq SoCs in Electric Drives applications. Showing examples of how PYNQ can enable software engineers and data scientists to easily gain valuable on-chip, real-time insights from data generated by the motor, with or without cloud connectivity. The key differentiation with PYNQ lies in the configurable hardware pre-processing of sensor data leading to the most efficient use of the application software.

Webinar Attendees will also learn:

• Why Xilinx for Industrial IoT Edge Platforms, using the example of modern Electric Drives
• Introduction to the speed and simplicity of the PYNQ Framework including Hardware Overlays, Jupyter Notebooks, and supported Python libraries
• How PYNQ can enable remote diagnostics, predictive maintenance, and the digital twin concept
• How to get started with PYNQ with links to kits, videos, papers, and community designs

Join us for this exciting edge analytics and machine learning event!

This year at Sensors Expo 2018, Xilinx, Avnet, and Deephi will be presenting the latest adaptable development platforms for AI, sensor fusion, and computer vision.

A Xilinx expert will also lead a conference session on machine learning for IIoT Preventive Maintenance, one of the largest areas recognized for monetization in the Industrial IoT.

Join us to discover more about how to efficiently develop your own unique machine learning platforms using Xilinx adaptable intelligence.

Hands-on Labs. CEO Keynote.
And an adaptable intelligent computing platform.

Date: May 30, 2018 | Time: 7:00am PDT / 10:00am EST / 15:00 GMT

Join this free webinar to learn how to drive visual intelligence solutions with Framos' SLVS-EC IP, Sony Imagers, and Xilinx machine vision platforms.

Xilinx, Framos, and Sony have partnered on a solution for the machine vision market. This solution will enable you to keep up with the industry demand for higher resolution and bandwidth while simplifying cabling and shrinking your footprint. Framos’ SLVS-EC IP brings support for the SLVS-EC standard found in Sony’s 3rd generation Pregius imagers to Xilinx platforms. Xilinx also provides optimized capabilities in machine learning, image processing, and sensor fusion to power the industry’s most compact and capable cameras.

Webinar Attendees will also learn:

• Sony Pregius Imager portfolio overview
• Availability and support of Framos IP for 28/20/16nm Xilinx product families
• Xilinx solutions for machine vision, surveillance, and other intelligent vision applications

 Register now for this exciting Xilinx, Framos, and Sony webinar event!

Date: May 8, 2018, 2018 | Time: 7:00am PDT / 10:00am EST / 15:00 GMT

Do you need a complete cybersecurity solution without losing focus on core competencies? Join us for our upcoming webinar.

In this free webinar, you will hear from Xilinx, Infineon Technologies, Avnet, and Mocana. These industry experts have partnered to introduce an IEC 62443-compliant hardware and software off-the-shelf solution that is consistent with guidelines from the Industrial Internet Consortium Security Framework and the Trusted Computing Group.

Within the hour, you will learn:

• Common platform security threat vectors
• Key elements of IEC 62443, Industrial Internet Consortium and Trusted Computing Group Recommended Guidelines for IIoT Security
• Principles of hardware-based security including the value of a strong hardware root-of-trust
• Integrated hardware and software solution from Xilinx, Infineon, Avnet, and Mocana

Register now to join us for this cybersecurity event!

Jumpstart Your Designs for Embedded Vision Applications

The $895 ZCU104 Evaluation Kit includes an HD camera and a Zynq® UltraScale+™ MPSoC EV device. As a component of Xilinx’s reVISION Stack, this kit enables embedded vision applications such as surveillance, Advanced Driver Assisted Systems (ADAS), machine vision, Augmented Reality (AR), drones, and medical imaging.

Additional components of the reVISION Stack include:

• SDSoC™ Environment for C/C++ based hardware acceleration
• 50+ OpenCV hardware-accelerated libraries with source code
• Machine learning inference with Caffe and TensorFlow

Buy the ZCU104 kit and visit the reVISION Zone to learn more and get access to resources for software, hardware, and system developers.

Did you miss our first Virtual Developer Lab or Online Office Hours webinar? Here's another chance to join.

Learn about Amazon EC2 F1 instances and the data center workloads they accelerate. These sessions will feature Xilinx and Amazon Web Services experts so you can get step-by-step instruction using Amazon EC2 F1 instances to accelerate your applications.

Join the solution architect online office hours webinar to get questions answered from Xilinx and Amazon Web Services experts regarding the AWS EC2 F1 offering, SDAccel, use cases, requirements, and more.

If you're getting started using AWS EC2 F1 instances or have questions about an existing EC2 F1 project, this is the webinar for you.

Register below for one or both of these webinars.

Virtual Developer Lab

Tuesday, April 24 | 12:30 PM - 3:00 PM PST

• Connect to an F1 instance
• Experience F1 acceleration
• Develop and optimize F1 application with SDAccel

Online Office Hours

Thursday, April 26 | 12:30 PM - 1:30 PM PST

• Answer questions from AWS EC2 F1 users
• Discuss use cases and technical questions
• Questions can be submitted and answered in English

Date: April 11, 2018 | Time: 10:00am PDT / 1:00pm EST / 18:00 GMT

Are you looking to integrate machine learning acceleration into your application? Join us for our upcoming webinar.

In this one hour webinar, Elliott Delaye, Xilinx Machine Learning principal engineer, will give you a detailed walk-through of CNN acceleration on the recently released Xilinx ML Suite, which is conveniently accessible on the Amazon EC2 cloud.

Register now to learn how to use this cloud-based software stack to evaluate, develop, and deploy machine learning capabilities into your accelerated applications on the AWS cloud.

The MiniZed SpeedWay Design Workshops™ help engineers jump-start the development of single-core Xilinx® Zynq®-7000 All Programmable SoC devices using the Avnet MiniZed™ Zynq SoC development board, a cost-optimized prototyping platform for embedded vision and Industrial IoT systems.

Video presentations of the four-part MiniZed SpeedWay Design Workshops are now available online for free.

Learn more

Did you miss the Xilinx Developer Lab at SC17, AWS reInvent, XDF Frankfurt or FPGA 2018?

The same experience is now available as a virtual developer lab. Learn about Amazon EC2 F1 instances and the data center workloads they accelerate. These sessions will feature Xilinx and Amazon Web Services experts so you can get step-by-step instruction using Amazon EC2 F1 instances to accelerate your applications.

Xilinx is also hosting solution architect online office hours to answer questions from potential Xilinx users regarding AWS EC2 F1 offering, SDAccel, use cases, requirements, technical questions and more.

If you’re getting started using AWS EC2 F1 instances or have questions about an existing EC2 F1 project, this is the webinar for you. Register below for one or both of these webinars.

Xilinx AWS Virtual Developer Lab (Tuesday, March 27, 12:30 PM - 3:00 PM PST)

• Connect to an F1 instance
• Experience F1 acceleration
• Develop and optimize F1 application with SDAccel
• Register Now

Online Office Hours (Thursday, March 29, 12:30 PM - 1:30 PM PST)

• Answer questions from users, discuss use cases, and more
• Questions can be submitted and answered in English
• Register Now

Targeting 5G network services and data center interconnect applications, these solutions give systems OEMs maximum flexibility and enable migration to next-generation designs, allowing for scalable performance at the lowest risk while ensuring network security.

Join us in booth #2807 for the following demonstrations:

• 400G Packet Classification and Search
• Flexible Inband network Telemetry for Flow Analytics with Barefoot
• Flexible Line Systems with FlexE
• FlexE Implementations for 5G
• Flexible PON Solutions

Also, join Xilinx and its ecosystem for the following presentations:

March 13, 2018 | Theater II, San Diego Convention Center Show Floor

• 12:45PM – 1:45PM – Ethernet Alliance Panel: Ethernet Roadmaps Update

March 14, 2018 | Expo Theater III, Exhibit Hall B2

• 11:00AM – 11:30AM – Panel with Xilinx and CMCC: Slicing Packet Network (SPN) Enabling 5G Services
• 11:30AM – 12:00PM – Fronthaul Challenges for the 5G Optical Network

For more additional information on Xilinx demos and presentations, please click here.

We are excited to be included in Barron’s 100 Most Sustainable Companies list. Check out the full list here: http://bit.ly/2nULcEX

This year, Xilinx showcased 8K and AV over IP Solutions at ISE 2018. Check out our booth demos recorded by rAVe publications.

Watch Now