Introducing the Vivado Expert Webinar Series
The Vivado® Expert Webinar Series features members of the Vivado Development Team sharing techniques, methodology, tips, and tricks to improve your FPGA design productivity.
The first webinar on July 26 will provide insight into Vivado High Speed Timing Closure Techniques. A summary of high speed design challenges will be presented, followed by design analysis techniques and guidelines, as well as complexity and congestion analysis.
Register now to learn how the Vivado Design Suite and UltraFast™ Design Methodology accelerate your design productivity.
Join us on July 18 at 10am PST to learn more about the Zynq® UltraScale+™ MPSoC EV device family and how it can be used in Media Streaming & Recording applications. The Zynq UltraScale+ MPSoC EV family includes:
- A Video Codec Unit
- A hardened multi-stream AVC/HEVC simultaneous encode and decode block that supports UHD-4Kp60
- Combined Xilinx, customer or partner IP in fabric, which provides a solution that can quickly and easily address opportunities in the streaming and recording market.
Register now to learn how Xilinx solutions allow you to support Any Media over Any Network in Pro AV & Broadcast applications.
Welcome Summer Interns!
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We are excited to welcome our 2017 Summer Interns in San Jose. We hope you enjoy learning and growing with us!
Learn more about Xilinx’s intern program here
Register for OpenCV on Zynq Webinar
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Date: July 12, 2017 | Time: 10:00 AM (PT) / 1:00 PM (ET) / 17:00 (GMT)
OpenCV libraries are widely used for algorithm prototyping by many leading technology companies and computer vision researchers. FPGAs can achieve unparalleled compute efficiency on complex algorithms like dense optical flow and stereo vision in only a few watts of power. However, unlocking these capabilities traditionally required hardware design expertise and use of languages like Verilog and VHDL.
In this 40-minute webinar, Xilinx will present a new approach that enables designers to unleash the power of FPGAs using hardware-tuned OpenCV libraries, a familiar C/C++ development environment, and readily available hardware development platforms.
Register here
Date: June 20, 2017 | Time: 10:00 AM (PT) / 1:00 PM (ET) / 17:00 (GMT)
Today most all avionics suppliers are trying to consolidate systems into common compute platforms, while simultaneously expanding performance and features.
In this webinar, Xilinx and its Alliance Program Members, DDC-I and Logicircuit, will present the benefits and features of Xilinx’s Zynq® UltraScale+™ MPSoCs as a reconfigurable common compute platform with flexible and reusable software and hardware modules to satisfy airborne requirements. The concepts and solutions presented can be extended to satisfy a broad range of safety critical, mission critical, and high-reliability systems.
Register here
Date: June 6, 2017 Time: 7 AM PST
Join Xilinx for the third, free webinar in the Precise, Predictive, and Connected Industrial IoT series. This webinar will provide insight into the role of All Programmable SoCs in the breath of applications across IIoT Edge and the connectivity between them. A brief summary of IIoT trends will be presented, followed by an overview of the Data Distribution Service (DDS) IIoT databus standard presented by RTI, the IIoT Connectivity Company, and how DDS and OPC UA target different connectivity challenges in IIoT systems.
Register here
New Webinar | Make Something Awesome with the $99 Embedded Kit
May 31, 2017 at 10:00 AM (PT) / 1:00 PM (ET) / 17:00 (GMT)
If you find many FPGA development boards and tools too expensive and difficult to use, tune in to this webinar where we’ll introduce you to Arty – an easy-to-use $99 FPGA-based embedded development kit from Xilinx. You’ll learn:
- How Arty compares with popular embedded development kits
- What’s included in the Arty kit
- Available tools to help speed your development
- Design resources available to help you succeed
If you’ve been looking for an embedded processor board and are thinking about trying FPGA design, register today.
In this webinar, Xilinx will present the Zynq® UltraScale+™ MPSoC and show how it can be used in KVM (keyboard, video, and mouse) applications. The webinar will highlight how Xilinx and its partners’ IP cores for video connectivity and video processing along with the device’s integrated H.265/HEVC codec can quickly and easily address opportunities in the KVM market.
Register today to learn how Xilinx solutions allow you to support Any Media over Any Network in Pro AV & Broadcast applications.
Register here for May 23, 2017 at 7am PST
Register here for May 23, 2017 at 10am PST
The Embedded Vision Summit is the event for innovators who want to incorporate visual intelligence into products. The 2017 Summit being held May 1-3 in Santa Clara, CA features four tracks with over 80 industry leading speakers, Vision Technology Workshops, a Vision Tank Competition and a Vision Technology Showcase. The Summit brings together more than 1000 industry innovators and technologists from around the world who are designing machines that see. Join us and save 10% using promotional code Xilinx17 during registration.
Date: April 11, 2017 Time: 10:00 AM PST
Join Xilinx for the third, free webinar in the Precise, Predictive, and Connected Industrial IoT series. This webinar will provide insight into the role of All Programmable SoCs in the breath of applications across IIoT Edge and the connectivity between them. A brief summary of IIoT trends will be presented, followed by an overview of the Data Distribution Service (DDS) IIoT databus standard presented by RTI, the IIoT Connectivity Company, and how DDS and OPC UA target different connectivity challenges in IIoT systems.
Register here
We’re excited to share that we have two YWCA Silicon Valley Tribute to Women Award Honorees! Kavita Khatwani from our Information Technology Team and Jenny Fan from our Engineering team will be honored at the 2017 YWCA Silicon Valley Tribute to Women Awards in May. Congratulations ladies!
Learn more: https://ywca-sv.secure-platform.com/a/organizations/main/home
Xilinx Announces New reVISION Stack
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Xilinx announced the reVISION™ stack expanding into a wide range of vision guided, machine learning applications. The new reVISION stack enables a broader set of software and systems engineers, with little or no hardware design expertise to develop intelligent vision guided systems easier and faster. These engineers can realize significant advantages when combining machine learning, computer vision, sensor fusion, and connectivity.
March 29, 2017 | 7 AM PST
In this Webinar, Xilinx will present the emerging field of augmented reality (AR) presenting a number of use cases outside of the more commonly known consumer examples. AR is a complex system comprised of real time object recognition and vision processing. Emerging techniques like machine learning will be discussed. Xilinx will present how the SDSoC™ development environment along with open source libraries enable software developers to rapidly prototype and deploy complete AR systems.
Xilinx Unveils Disruptive Breakthrough for 5G Wireless with RF-Class Analog Technology
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Xilinx has announced a disruptive integration and architectural breakthrough for 5G wireless with the infusion of RF-class analog technology into its 16nm All Programmable MPSoCs. Xilinx’s new All Programmable RFSoCs eliminate discrete data converters, providing 50-75% power and footprint reduction for 5G massive-MIMO and millimeter wave wireless backhaul applications.
Learn more here
Join us for our second Webinar in our Precise, Predictive, and Connected IIoT series, this free Webinar will provide insight into the role of All Programmable SoCs in Smart Factory Automation and Connectivity. A brief summary of IIoT applications will be presented followed by a technical overview of OPC UA, the data sharing standard of choice for Industry 4.0, presented by Matrikon, the leader in information visualization technology.
Ready to work at Xilinx? We’ll be visiting UC Davis, Stanford, Cal Tech and more this month.
For a full list of locations and dates visit https://www.xilinx.com/hr/university-recruiting.html
The Next Platform has just published a book titled “FPGA Frontiers: New Applications in Reconfigurable Computing”. Their analysis goes beyond news events to bring readers a comprehensive sense of what happened and where the new growth areas for FPGA acceleration will be in 2017. Be the first to read it!
Click here by January 27 to download your free eBook copy.
Reconfigurable acceleration is gaining significant momentum in cloud data centers. In this video series from SC16, Xilinx engineers and architects discuss how FPGAs are accelerating the widest range of data center workloads:
- Machine Learning and Data Analytics
- Video Transcoding
- Storage and Network Acceleration
Watch the videos here. Learn more about the Xilinx Reconfigurable Acceleration Stack.
Date: January 12, 2017
In this Free Webinar, Xilinx will present critical challenges facing developers of advanced medical imaging systems. Xilinx and Xilinx Alliance Program Member, Topic Embedded, will present how its development environment, DYPLO, along with its SoM and medical-specific carrier board and IP provide an ecosystem enabling users to quickly and easily address new designs in the medical imaging market.
Register here
Join us for our second Webinar in our Precise, Predictive, and Connected IIoT series, this free Webinar will provide insight into the role of All Programmable SoCs in Smart Factory Automation and Connectivity. A brief summary of IIoT applications will be presented followed by a technical overview of OPC UA, the data sharing standard of choice for Industry 4.0, presented by Matrikon, the leader in information visualization technology.
Accelerate High-Bandwidth Applications with New Virtex UltraScale+ FPGA Eval Kit
The Virtex® UltraScale+™ FPGA VCU118 Evaluation Kit is the ideal development environment for accelerating ultra-high bandwidth applications with Virtex UltraScale+ FPGAs which provide the highest performance and integration capabilities in a FinFET node.
The VCU118 Evaluation Kit delivers:
- Virtex UltraScale+ VU9P silicon with integrated blocks for PICe® Gen3 x 16, Gen4 x 8, 100G Ethernet MAC with RS-FEC and 150G Interlaken cores
- FMC+ IO expansion interface enabling 600G of serial communication
- Dual QSFP28 100G optical interfaces
For more information on how the VCU118 can help you accelerate your design cycle, click here.
