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JESD204B
SPI CLk
capture asynchronous
clock
Crash
SPI
xdc
EMIO
jesd
REFCLK
TIMING
$readmem
Absolute
axi lite
block design
btree
clocka
DDS
DIFF_TERM
DONT_TOUCH
Error
false path
File
GPIO
GTX Ref clk
import file
inout
JESD204
LCR
LVCMOS
MCR
multibit
offset
out of context
packager
readmemh
Real Time Clock
reduce
relative
report_methodology
reset pin
Resource
segmentation fault
simulation
simulation sources
size
suppress
synchronizer
tcl
TCL Store
termination
testbench
Tlast
tri-state
tristate
Type
vector
verilog
warning