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Tag: "Aurora 64B66B"
4 posts
|
3 taggers
|
First used:
01-19-2018
Latest Tagged
Re: Auroura 64B66B Transceiver Setup
- (
06-29-2020
07:38 AM
)
Xilinx IP Catalog
by
aakhmedov
on
06-29-2020
07:38 AM
0
Replies
61
Views
0
Replies
61
Views
Low-Jitter clocks for Aurora 64B/66B
- (
01-21-2020
09:23 AM
)
Serial Transceivers
by
joe306
on
01-21-2020
09:23 AM
Latest post on
01-21-2020
10:16 PM
by
karnanl
3
Replies
298
Views
3
Replies
298
Views
Re: Mixed vs VHDL Simulation Issues (generally and...
- (
01-19-2018
06:53 AM
)
Simulation and Verification
by
florentw
on
01-19-2018
06:53 AM
5
Replies
1805
Views
5
Replies
1805
Views
Mixed vs VHDL Simulation Issues (generally and spe...
- (
01-18-2018
08:33 AM
)
Simulation and Verification
by
mistercoffee
on
01-18-2018
08:33 AM
Latest post on
01-19-2018
07:59 AM
by
florentw
6
Replies
1841
Views
6
Replies
1841
Views
View All ≫
Top Tagged
Re: Auroura 64B66B Transceiver Setup
- (
06-29-2020
07:38 AM
)
Xilinx IP Catalog
by
aakhmedov
on
06-29-2020
07:38 AM
0
Replies
61
Views
0
Replies
61
Views
Low-Jitter clocks for Aurora 64B/66B
- (
01-21-2020
09:23 AM
)
Serial Transceivers
by
joe306
on
01-21-2020
09:23 AM
Latest post on
01-21-2020
10:16 PM
by
karnanl
3
Replies
298
Views
3
Replies
298
Views
Re: Mixed vs VHDL Simulation Issues (generally and...
- (
01-19-2018
06:53 AM
)
Simulation and Verification
by
florentw
on
01-19-2018
06:53 AM
5
Replies
1805
Views
5
Replies
1805
Views
Mixed vs VHDL Simulation Issues (generally and spe...
- (
01-18-2018
08:33 AM
)
Simulation and Verification
by
mistercoffee
on
01-18-2018
08:33 AM
Latest post on
01-19-2018
07:59 AM
by
florentw
6
Replies
1841
Views
6
Replies
1841
Views
View All ≫
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florentw
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karnanl
1
aakhmedov
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joe306
on
01-21-2020
09:23 AM
Latest post on
01-21-2020
10:16 PM
by
karnanl
