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apetley
Xilinx Employee
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About apetley
Latest posts by apetley
Subject
Views
Posted
Re: FDCP cannot be timed accurately Critical warni...
Synthesis
344
04-13-2021
08:50 AM
Re: FDCP cannot be timed accurately Critical warni...
Synthesis
387
04-13-2021
07:51 AM
Re: [DRC INBB-3] Black Box Instances : for adding ...
Synthesis
202
04-01-2021
03:22 AM
Re: IOB register in out of context module
Synthesis
165
03-31-2021
10:10 AM
Re: Info/Warning messages in Cross Boundary and Ar...
Synthesis
157
03-25-2021
09:47 PM
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My Accepted Solutions
Subject
Views
Posted
Re: integers multiply driven error in behav sim
Synthesis
192
03-24-2021
07:59 AM
Re: Single IP force re-synthesis
Synthesis
217
03-23-2021
02:50 AM
Re: process sensitivity list
Synthesis
179
03-21-2021
08:07 AM
Re: what is elab.rtd file
Synthesis
141
03-21-2021
07:55 AM
Re: [Synth 8-3512] assigned value '2' out of range...
Synthesis
366
02-19-2021
02:03 AM
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Community Statistics
Posts
165
Solutions
35
Kudos given
19
Kudos received
73
Member Since
06-14-2018
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Date Last Visited
04-13-2021
01:59 PM
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