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apetley
Xilinx Employee
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About apetley
Latest posts by apetley
Subject
Views
Posted
Re: Can the Vivado recongize the synthesize
Synthesis
149
05-14-2020
11:40 PM
Re: Can the Vivado recongize the synthesize
Synthesis
198
05-14-2020
10:08 PM
Re: Issues with Synthesis of a design, (Constraint...
Synthesis
145
05-14-2020
05:13 AM
Re: Odd mismatched array error
Synthesis
168
05-14-2020
04:51 AM
Re: [Synth 8-295] found timing loop. => LUT with ...
Synthesis
398
05-12-2020
07:23 AM
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My Accepted Solutions
Subject
Views
Posted
Re: Can the Vivado recongize the synthesize
Synthesis
198
05-14-2020
10:08 PM
Re: Odd mismatched array error
Synthesis
168
05-14-2020
04:51 AM
Re: How to properly extract extraneous elements fr...
Synthesis
142
05-11-2020
11:58 PM
Re: fsm_extraction is not taking effect
Synthesis
128
05-06-2020
06:40 AM
Re: How to give variable parameters to synthesis_d...
Synthesis
222
04-30-2020
11:29 PM
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Community Stats
Posts
100
Solutions
22
Kudos Given
11
Kudos Received
47
Member Since
06-14-2018
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Date Last Visited
05-15-2020
01:36 AM
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