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gguasti
Xilinx Employee
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About gguasti
Latest posts by gguasti
Subject
Views
Posted
Re: decent_q not working
AI and Vitis AI
48
05-29-2020
10:49 PM
Re: CoaXPress on Kintex7
Serial Transceivers
146
05-29-2020
09:02 AM
Re: Logic behind using Docker for Vitis AI?
AI and Vitis AI
74
05-29-2020
12:58 AM
Re: decent_q not working
AI and Vitis AI
164
05-28-2020
09:18 AM
Re: decent_q not working
AI and Vitis AI
183
05-28-2020
07:58 AM
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My Accepted Solutions
Subject
Views
Posted
Re: ADC data connected to ZYNQ
Other FPGA Architecture
84
05-26-2020
11:06 PM
Re: Using IBERT to test a receiver on a Artix
Serial Transceivers
114
05-25-2020
06:15 AM
Re: How multi-thread work on ZCU102?
AI and Vitis AI
70
05-20-2020
08:10 AM
Re: "[VAI_C][ERROR]'Const' op should be fused with...
AI and Vitis AI
96
05-08-2020
10:55 AM
Re: Vivado 2019.2 crush with error RDI_PROG" "$@"
AI and Vitis AI
112
05-05-2020
12:45 AM
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Community Stats
Posts
531
Solutions
83
Kudos Given
390
Kudos Received
390
Member Since
11-29-2007
Contact Me
Online Status
Offline
Date Last Visited
05-30-2020
02:11 AM
Kudos from
Member
Kudos
roym
72
Ratheesh
1
meherp
3
xrancano@alumno
s.uvigo.es
3
jasonwu
26
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Kudos given to
Member
Kudos
meherp
14
graces
18
jasonwu
36
Abner
1
lgarrido@harris
.com
1
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Latest Tags
docker
ry for the delay in my …
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