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simon
Xilinx Employee
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About simon
Latest posts by simon
Subject
Views
Posted
回复： Very low power analysis with a SAIF file
Vivado Debug and Power Estimation Tools
149
11-14-2020
01:33 AM
回复： Zynq Ultrascale+ VCCINT_VCU decoupling
Versal and UltraScale Architecture™
96
11-10-2020
06:27 AM
Re: gtx sata3 oob settings
Serial Transceivers
277
09-19-2020
04:48 PM
回复： Connector Cross-talk Requirement for Ultrascal...
Serial Transceivers
146
09-16-2020
06:56 PM
回复： Is it possible to program xc2c256 using vivado...
FPGA Configuration
171
09-09-2020
06:46 PM
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My Accepted Solutions
Subject
Views
Posted
回复： Very low power analysis with a SAIF file
Vivado Debug and Power Estimation Tools
149
11-14-2020
01:33 AM
回复： Is it possible to program xc2c256 using vivado...
FPGA Configuration
171
09-09-2020
06:46 PM
Re: Ambiguity between XPE and DS189; Startup Curre...
Other FPGA Architecture
218
07-15-2020
01:56 AM
回复： Powered transceiver, but not used in FPGA desi...
Serial Transceivers
313
06-11-2020
01:11 AM
回复： Temperature sensing Apu & Rpu documentation
Versal and UltraScale Architecture™
325
04-27-2020
02:01 AM
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Community Statistics
Posts
795
Solutions
148
Kudos given
15
Kudos received
258
Member Since
08-25-2010
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Online Status
Offline
Date Last Visited
11-23-2020
07:42 AM
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