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deepalir
Xilinx Employee
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About deepalir
Latest posts by deepalir
Subject
Views
Posted
Re: DDR Analysis
Memory Interfaces and NoC
86
03-29-2021
03:30 PM
Re: versal DDR4 and QDRIV PCB impedance design
Memory Interfaces and NoC
107
03-29-2021
11:43 AM
Re: versal DDR4 devices TEN(devices) required PCB ...
Memory Interfaces and NoC
126
03-29-2021
11:34 AM
Re: K4A8G165WC-BCTD DDR4 chip support in Zynq Ultr...
Memory Interfaces and NoC
250
01-20-2021
03:14 PM
Re: vivado2020.2 DDR4 two rank calibration fail
Memory Interfaces and NoC
235
01-20-2021
02:19 PM
View All ≫
My Accepted Solutions
Subject
Views
Posted
Re: versal DDR4 and QDRIV PCB impedance design
Memory Interfaces and NoC
107
03-29-2021
11:43 AM
Re: versal DDR4 devices TEN(devices) required PCB ...
Memory Interfaces and NoC
126
03-29-2021
11:34 AM
Re: K4A8G165WC-BCTD DDR4 chip support in Zynq Ultr...
Memory Interfaces and NoC
250
01-20-2021
03:14 PM
Re: RDIMM worked in Vivado 2020.1 - doesn't work i...
Memory Interfaces and NoC
308
01-20-2021
02:14 PM
Re: Ultrascale+ dual rank DDR4 DIMM
Memory Interfaces and NoC
359
01-19-2021
02:44 PM
View All ≫
Community Statistics
Posts
55
Solutions
13
Kudos given
3
Kudos received
32
Member Since
02-21-2019
Contact Me
Online Status
Offline
Date Last Visited
03-31-2021
12:31 AM
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kshimizu
4
rohanmahapatra
1
baf2099
1
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2
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calebd
1
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