Solutions
Products
Support
Solutions
Products
Support
Solutions
Products
Support
Solutions
Products
Support
Solutions
Products
Support
Account
My Account
Create Account
Sign Out
Search
All
Silicon Devices
Boards and Kits
Intellectual Property
Support
Documentation
Knowledge Base
Community Forums
Partners
Videos
Press
Search
Browse
Sign In
Help
naz_rb
Adventurer
View all badges
Community Forums
:
About naz_rb
Latest posts by naz_rb
Subject
Views
Posted
Simple Dual Port URAM read and write simultaneousl...
Xilinx IP Catalog
667
05-16-2020
06:08 PM
ZYNQ writes only LSB byte to a 32bit register of a...
High-Level Synthesis (HLS)
600
04-04-2020
10:23 PM
Re: How to properly cast unsigned to signed
High-Level Synthesis (HLS)
758
03-18-2020
06:58 AM
Re: How to properly cast unsigned to signed
High-Level Synthesis (HLS)
769
03-18-2020
06:40 AM
How to properly cast unsigned to signed
High-Level Synthesis (HLS)
861
03-16-2020
05:36 PM
View All ≫
My Accepted Solutions
Subject
Views
Posted
Re: Xilinx SDK drivers "ps" meaning
Processor System Design and AXI
953
03-05-2020
05:35 AM
Re: HLS 2019 is missing libpng12.so on LTS 18.04
High-Level Synthesis (HLS)
1139
12-12-2019
06:16 AM
View All ≫
Community Statistics
Posts
65
Solutions
2
Kudos given
25
Kudos received
2
Member Since
11-10-2019
Contact Me
Online Status
Offline
Date Last Visited
05-20-2020
10:48 AM
Kudos from
Member
Kudos
abouassi
1
jg_spitfire
1
View All ≫
Kudos given to
Member
Kudos
avrumw
1
abouassi
1
sabankocal
1
hpoetzl
1
florentw
1
View All ≫
Latest Tags
HLS
BRAM
synthesis
utilization
View All ≫
