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tenzinc
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About tenzinc
Latest posts by tenzinc
Subject
Views
Posted
Re: FPGA thermal model?
Other FPGA Architecture
36
04-12-2021
09:04 AM
Re: Versal DSP58 Primitive Template
Versal and UltraScale Architecture™
107
04-08-2021
02:01 PM
Re: Suffix 4596
Other FPGA Architecture
109
04-08-2021
10:54 AM
Re: KU15p temperature at -279.4 when not programme...
Other FPGA Architecture
60
04-07-2021
10:48 AM
Re: Pacakge and I/O pins
Other FPGA Architecture
77
04-05-2021
08:30 AM
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My Accepted Solutions
Subject
Views
Posted
Re: Pacakge and I/O pins
Other FPGA Architecture
77
04-05-2021
08:30 AM
Re: Report power vs XPE
Vivado Debug and Power Estimation Tools
114
03-31-2021
11:00 AM
Re: Temperature range
Versal and UltraScale Architecture™
335
03-22-2021
03:27 PM
Re: Adjusting design main clock dynamically
Other FPGA Architecture
164
03-16-2021
10:24 AM
Re: ZU27DR RFSoC data sheet and pinout
Versal and UltraScale Architecture™
173
03-10-2021
10:36 AM
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Community Statistics
Posts
498
Solutions
136
Kudos given
63
Kudos received
223
Member Since
09-18-2014
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Date Last Visited
04-12-2021
09:00 AM
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