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joseraul
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About joseraul
Latest posts by joseraul
Subject
Views
Posted
Qemu support for performance monitoring unit
Embedded Linux
2066
01-27-2017
08:44 AM
C code not synthesizable by functions
High-Level Synthesis (HLS)
4472
11-14-2016
09:17 AM
instruction trace on Zybo with ARM's CoreSight
Processor System Design and AXI
3811
08-26-2016
05:38 AM
DSP/LUT area ratio on 7 series
Other FPGA Architecture
4717
07-20-2016
06:01 AM
Re: Design empty after HLS synthesis
High-Level Synthesis (HLS)
6864
12-02-2015
03:32 AM
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Community Stats
Posts
24
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0
Kudos Given
1
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0
Member Since
11-26-2014
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Date Last Visited
01-30-2017
09:07 AM
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Latest Tags
ARM
DSP48
DSPs
LUTS
performance counters
QEMU
register balancing
reister retiming
SIMD
Utilization report
Vivado
ZYNQ
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