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sha@hys
sha@hys
Explorer
100 Replies
10 Year Anniversary
10 Accepted Solutions
50 Topics
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Latest posts by sha@hys
Subject Views Posted

Re: Zynq ultrascale interrupt controller registers

Processor System Design and AXI
779 ‎10-01-2018 03:25 AM

Zynq ultrascale interrupt controller registers

Processor System Design and AXI
796 ‎10-01-2018 01:58 AM

Re: Quad Spi interrupt enabling in Zynq Ultrascale

Processor System Design and AXI
747 ‎09-29-2018 09:14 PM

Quad Spi interrupt enabling in Zynq Ultrascale

Processor System Design and AXI
789 ‎09-29-2018 03:32 AM

Timer Interrupt loop execution time

Processor System Design and AXI
2100 ‎06-21-2017 05:24 AM
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My Accepted Solutions
Subject Views Posted

Re: Dual port BRAM read unsuccessful from custom v...

General Technical Discussion
19115 ‎08-20-2015 04:54 AM

Re: XPS error when configuring microblaze

Processor System Design and AXI
14994 ‎08-03-2015 11:37 PM
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Posts 155
Solutions 10
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Kudos received 1
Member Since ‎05-31-2015
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‎10-02-2018 01:45 AM
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