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sulemanzp
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About sulemanzp
Latest posts by sulemanzp
Subject
Views
Posted
Export Sources Window Tree View to Excel similar t...
Design Entry
417
11-27-2019
10:59 PM
Stop receiving Ethernet packets after some time on...
Ethernet
413
08-07-2019
06:31 AM
Re: ZCU111 DAC/ADC how to use?
Xilinx Evaluation Boards
2774
04-11-2019
04:06 AM
Re: ZCU111 board, eval tool gives 14 bit data inst...
Xilinx Evaluation Boards
861
04-11-2019
03:51 AM
Re: ZCU111 DAC/ADC how to use?
Xilinx Evaluation Boards
2791
04-11-2019
02:11 AM
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My Accepted Solutions
Subject
Views
Posted
Re: ZCU111 board, eval tool gives 14 bit data inst...
Xilinx Evaluation Boards
861
04-11-2019
03:51 AM
Re: Procedure For Single Tile ADCs Synchronization...
Versal and UltraScale Architecture™
708
03-25-2019
11:33 PM
Re: Data Transfer from Linux to AXI Memory Mapped...
PCIe and CPM
3804
10-12-2017
04:18 AM
Re: User Managed IP Module not found Block Design
Synthesis
4917
10-08-2017
11:42 PM
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Community Statistics
Posts
29
Solutions
5
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Kudos received
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Member Since
03-12-2017
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Date Last Visited
12-18-2019
08:10 AM
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Latest Tags
PCIE
DMA
linux
ZYNQ
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AXI Memory Mapped
baremetal
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