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ziladdev
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About ziladdev
Latest posts by ziladdev
Subject
Views
Posted
differential clock input on Zynq MPSoC
Versal and UltraScale Architecture™
463
02-26-2020
06:29 AM
Re: HDMI/DVI RX on Zynq Ultrascale MPSOC
Video and Audio
1028
01-09-2020
05:59 AM
Re: HDMI/DVI RX on Zynq Ultrascale MPSOC
Video and Audio
1096
01-08-2020
07:11 AM
Re: HDMI/DVI RX on Zynq Ultrascale MPSOC
Video and Audio
1181
01-07-2020
03:30 PM
HDMI/DVI RX on Zynq Ultrascale MPSOC
Video and Audio
1229
01-07-2020
05:22 AM
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My Accepted Solutions
Subject
Views
Posted
Re: Autoloading a module at startup.
Embedded Linux
959
07-09-2018
03:40 AM
Re: HLS video stream passthrough corrupt video whe...
High-Level Synthesis (HLS)
2883
10-13-2017
05:16 AM
Re: IP core crashes (never an ap_done) calling fun...
High-Level Synthesis (HLS)
1250
10-05-2017
05:23 AM
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Community Statistics
Posts
65
Solutions
3
Kudos given
9
Kudos received
5
Member Since
08-16-2017
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Date Last Visited
02-27-2020
04:47 AM
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