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ronnu
Explorer
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About ronnu
Latest posts by ronnu
Subject
Views
Posted
Re: CORDIC 5.0 vector translation phase out incor...
AI Engine, DSP IP and Tools
944
03-16-2020
08:59 AM
Re: CORDIC 5.0 vector translation phase out incor...
AI Engine, DSP IP and Tools
978
03-16-2020
07:04 AM
Re: Using both LVDS and LVCMOS18 in one bank
Other FPGA Architecture
753
01-02-2020
11:10 AM
Re: Using both LVDS and LVCMOS18 in one bank
Other FPGA Architecture
777
01-02-2020
10:45 AM
Using both LVDS and LVCMOS18 in one bank
Other FPGA Architecture
791
01-02-2020
10:36 AM
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My Accepted Solutions
Subject
Views
Posted
Re: ps7_init not created with HDF creation
Embedded Development Tools
552
12-18-2019
09:02 AM
Re: Failure to initialize Microchip PHY in lwIp ec...
Ethernet
1817
12-02-2019
12:22 PM
Re: AXI DMA S2MM error bit set after first transac...
Xilinx IP Catalog
833
11-26-2019
10:12 AM
Re: FreeRTOS interrupt priority
Embedded Development Tools
1534
11-23-2019
12:31 AM
Re: Vivado splits bus signals up when debuging wit...
Implementation
650
08-11-2019
11:20 AM
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Community Statistics
Posts
111
Solutions
12
Kudos given
12
Kudos received
7
Member Since
10-14-2017
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Offline
Date Last Visited
03-16-2020
01:37 PM
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Latest Tags
ZYNQ
analog devices AD9361 p…
embedded
freertos
IOSTANDARD LVDS LVCMOS1…
kernel
linux
lwIP
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