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General Discussion
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A board for new Xilinx Users to discuss any technical issues they are facing using any of our products.
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A board to discuss topics on general Xilinx products, applications and solutions.
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A board to discuss topics on forum features and usage.
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Silicon Devices
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A board to discuss topics on Virtex® Family FPGAs, including Virtex-6, Virtex-5, Virtex-4, Virtex-II Pro, Virtex-II, Virtex/E/EM etc.
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A board to discuss topics on Spartan® Family FPGAs, including Spartan-6, Spartan-3A DSP, Spartan-3AN, Spartan-3A, Spartan-3E, Spartan-3, Spartan-IIE, Spartan-II, Spartan/XL etc.
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A board to discuss topics on Xilinx® Unified Architecture including Artix™-7, Kintex™-7, and Virtex®-7.
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A board to discuss topics on Xilinx CPLDs, including the CoolRunner™-II, CoolRunner XPLA3, and the XC9500/XL/XV device families.
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A board to discuss topics on Configuration PROMs, EasyPath™ Series etc.
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Design Tools
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A board to discuss TCL usage in Vivado. Users are encouraged to share their scripting examples and questions.
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A board to discuss topics involving installation, licensing, updates, and operating system support for all products in the Vivado™ Design Suite and the ISE Design Suite™.
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A board to discuss topics involving Xilinx tools for design entry and management, including Vivado™ IP Catalog, Project Navigator™, Core Generator™, Schematic Entry etc
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A board to discuss topics involving simulation and verification tools and flows, including XSIM and ISE Simulator™, 3rd party simulators, and formal verification.
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A board to discuss topics involving HDL synthesis tools and practices, including Vivado™ Synthesis, XST™, 3rd party synthesis tools, HDL coding practices and tips.
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A board to discuss topics involving design implementation tools and practices, including Vivado™ Implementation, Translate, Map, Place and Route, SmartXplorer, and FPGA Editor.
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A board to discuss topics involving timing analysis including tools and best practices, including Timing closure and XDC Timing Analyzer™, TRACE™, Timing Constraints, and Speed Files.
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A board to discuss Partitions, Partial Reconfiguration and Design Preservation flows.
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A board to discuss topics involving design planning tools and flows, including pin planning, floorplanning, TimeAhead, DesignAhead, and advanced design debugging.
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A discussion board for tools not covered by the other existing boards including Vivado™ High-Level Synthesis (HLS) methodology and practices (covering C,C++, SystemC coding practices, architecture exploration, HDL generation, verification and integration) in ChipScope Pro, XPower Analyzer, iMPACT, and others.
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A board containing archived posts, from before 2008, on ISE™ Foundation™, ISE™ WebPACK™, including design entry, Synthesis, Implementation etc. No new topics are being added but users can add information to existing topics.
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Embedded Solutions
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A board to discuss EDK and Platform Studio SDK, Board Support Package (BSP) generation, Compiler and Debugger Tools, etc.
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A board to discuss topics on the Zynq 7000 Family PS, ARM Processors, MicroBlaze, soft IP cores, AXI Interface, PPC processors, OPB / PLB Bus’, etc.
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This board contains discussions about embedded Linux which runs on Xilinx FPGAs and Board Based TRD’s including Xilinx Open Source Linux, PetaLinux, the PetaLinux tools for development and deployment of Linux on Xilinx hardware, and commercial Linux from other vendors.
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A board to discuss topics on PicoBlaze
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DSP Solutions
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A board to discuss topics on System Generator for DSP and AccelDSP™
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A board to discuss error correction, filtering, telecommunications, wireless, Digital Signal Processing, mathematical functions, multimedia, video and imaging IPs and usage of XtremeDSP slice
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Boards and Kits
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A board to discuss topics on Xilinx evaluation boards, kits, FMC daughter-cards, and reference designs
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A board to discuss topics on Third Party and other vender's development and expansion boards.
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Intellectual Property
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A board to discuss topics on PCI Express.
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A board to discuss topics on connectivity IP cores including PCI PCI-X, RapidIO, SPI-4.2, SPI-3, Ethernet, etc.
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A board to discuss topics on MIG GUI,DDR2,DDR3,DDRII, RLDRAM,QDR,QDRII,LPDDR,MCB,etc
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A board to discuss topics on System Logic IP including FIFO Generator, Block Memory Generator, CAM, and Distributed Memory Generator.
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