09-28-2011 08:27 AM
I'm facing some problems with the use of chipscope :
I have a lot of digital noise on the value measured via chipscope. Values I'm reading are sometime really really polluted by 1024, 2048, 4096 etc....
for exemple instead of reading 15, I'm reading 15 + 1024 (or 2048, 4096 etc...)
the noise is always a power of 2 or an addition of power of 2.
it's seems that some bits are changing with a delay.
Thank you to let me know if someone know a trick to solve it.
09-28-2011 03:51 PM
09-28-2011 06:47 PM
Seems to be a timing issue.
You're capturing a bus and some upper bit is captured as 1 which is expected to be 0. For example, the expected value is 00000001111 (15), while the captured value is 10000001111 (15+1024).
Make sure you have period constraint added to the ILA capture clock net and your timing constraints are met after adding chipscope in your design. Don't connect combinatorial logic to ILA but connect the register output signals.
09-29-2011 02:23 AM
Thank you for your answers guys.
The process have this behaviour :
For each master clock I check an input flag,
If this flag is ok I'm doing an addition, shift etc...
after that I made the activation of an output flag, just to monitor the result with the chipscope.
I found on another forum this point : when using chipscope, becareful to always check a mutiple of 8 bit and 5bit more to use one more register. for example if you want to check a 16bits value you have to make a chipscope of 21bits.
I tested it yesterday and results are more clean, but I still have some noise.
this is why I'm almost sure this is also a timming issue. But how can I solve it...
09-29-2011 05:55 AM
I've never heard of doing that, and I've never had trouble of this kind.
Is your design's timing constrained? Does your design actually meet timing with the ChipScope Pro core inserted? Is the ILA monitoring the output of registers or combinatiorial logic?