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--- Win Prizes for Kudos! ---
From now on, every time you provide a good solution or post valuable information on Xilinx User Community Forums, you will be awarded Special Kudos by the Forum Administrators. Every six months, the top two Kudos winners will receive a very special prize from Xilinx! So, for a chance to claim your well-earned reward, please continue to reply to questions and post elite messages on our Forums. Your contributions are always appreciated!
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PLD Blog
Latest Article - Package Generated Alpha Particles: They are a Problem and Here is the Information
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General Technical Discussion
A board to discuss topics on general Xilinx products, applications and solutions.
Latest Thread - Building a 24 hour clock for school project
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Forum Usage
A board to discuss topics on forum features and usage.
Latest Thread - Timing violation warning in Simulator 29
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Virtex® Family FPGAs
A board to discuss topics on Virtex® Family FPGAs, including Virtex-5 Multi-Platform FPGA, Virtex-4 Multi-Platform FPGA, Virtex-II Pro Platform FPGA, Virtex-II Platform FPGA, Virtex/E/EM etc.
Latest Thread - ML-403 base system builder
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Spartan® Family FPGAs
A board to discuss topics on Spartan® Family FPGAs, including Spartan-3A DSP, Spartan-3AN, Spartan-3A, Spartan-3E, Spartan-3, Spartan-IIE, Spartan-II, Spartan/XL etc.
Latest Thread - IP core generator??
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CPLDs
A board to discuss topics on Xilinx CPLDs, including the CoolRunner™-II, CoolRunner XPLA3. and the XC9500/XL/XV device families.
Latest Thread - CPLD cool runner 2 LCD not displaying correctly from altered demomain
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Others
A board to discuss topics on Configuration PROMs, EasyPath™ Series etc.
Latest Thread - pin 79 of System ACE controller chip
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Installation
A board to discuss topics involving installation, updates, and operating system support for all products in the ISE Design Suite™.
Latest Thread - Update ISE10.1 to ISE10.1.03
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Design Entry
A board to discuss topics involving Xilinx tools for design entry and management, including Project Navigator™, Core Generator™, and StateCAD™ etc.
Latest Thread - How do I remove a Project from ISE 11.3?
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Simulation and Verification
A board to discuss topics involving simulation and verification tools and flows, including ISE Simulator™, 3rd party simulators, and formal verification.
Latest Thread - Error using simprim
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Synthesis
A board to discuss topics involving HDL synthesis tools and practices, including XST™, 3rd party synthesis tools, HDL coding practices and tips.
Latest Thread - using DCM in virtex-5
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Implementation
A board to discuss topics involving design implementation tools and practices, including Translate, Map, Place and Route, SmartXplorer, and FPGA Editor .
Latest Thread - switch name -frequency greyed out when using Synplify
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Timing Analysis
A board to discuss topics involving timing analysis including tools and best practices, including Timing Analyzer™, TRACE™, Timing Constraints, and Speed Files.
Latest Thread - OFFSET IN DDR timing constraints....again.....
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PlanAhead
A board to discuss topics involving PlanAhead tools and flows, including pin planning, floorplanning, TimeAhead, DesignAhead, and advanced design debugging.
Latest Thread - PlanAhead 11.1 Set PR project not available
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Others
A discussion board for tools not covered by the other existing boards including ChipScope Pro, XPower Analyzer, iMPACT, and others.
Latest Thread - I'm not able to Readback with IMPAC
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Old ISE Board -- no new thread
A board to discuss topics on ISE™ Foundation™, ISE™ WebPACK™, including design entry, Synthesis, Implementation etc.
Latest Thread - How can i use UART and Block RAM by XC3s50an
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EDK and Platform Studio
A board to discuss topics on Platform Studio Integrated Development Environment (IDE),Platform Studio Software Development Kit (SDK), Embedded Systems Compiler and Debugger Tools, Board Support Package (BSP) generation, Operating System etc.
Latest Thread - Problems with adding IIC IP core from IP catalog
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Embedded Processing
A board to discuss topics on Embedded IP cores inlcuding MicroBlaze, PPC, PLB, OPB, GPIO, UART, Ethernet, EMC controller, SDR/DDR Controller etc.
Latest Thread - how to disable optimization?
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Embedded Linux
This board contains discussions about embedded Linux which runs on Xilinx FPGAs and is based on Open Source Linux and Commerical Linux from other vendors.
Latest Thread - Acknowledging Interrupts
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PicoBlaze
A board to discuss topics on PicoBlaze
Latest Thread - PicoBlaze : Software Inplementation of PWM : Problem with Hyper Terminal
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DSP Tools
A board to discuss topics on System Generator for DSP and AccelDSP™
Latest Thread - SYSTEM GENERATOR problem
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Digital Signal Processing - IP and Algorithms
A board to discuss error correction, filtering, telecommunications, wireless, Digital Signal Processing, mathematical functions, multimedia, video and imaging IPs and usage of XtremeDSP slice
Latest Thread - How can I implement a mac filter?
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Xilinx Boards and Kits
A board to discuss topics on Xilinx development and expansion boards.
Latest Thread - Problem with USB to Serial adaptor
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Others
A board to discuss topics on Third Party and other vender's development and expansion boards.
Latest Thread - CPLD Starter Kit LCD 16x2 question
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PCI Express
A board to discuss topics on PCI Express.
Latest Thread - Can't configure BAR number and type in PCI Bridge!!?
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Connectivity
A board to discuss topics on connectivity IP cores including PCI PCI-X, RapidIO, SPI-4.2, SPI-3, GEMAC etc
Latest Thread - How to set TXPOLARITY for XPS_LL_TEMAC
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Others
A board to discuss topics on IP other than DSP, Embedded and Connectivity, including Memory Interface, Distributed Memory etc.
Latest Thread - Ise Error in DDR2 SDRAM Control for Spartan6
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| Announcements |
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