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--- Win Prizes for Kudos! ---
From now on, every time you provide a good solution or post valuable information on Xilinx User Community Forums, you will be awarded Special Kudos by the Forum Administrators. Every six months, the top two Kudos winners will receive a very special prize from Xilinx! So, for a chance to claim your well-earned reward, please continue to reply to questions and post elite messages on our Forums. Your contributions are always appreciated!

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PLD Blog
Latest Article - The ‘Programmable Imperative’
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General Technical Discussion
A board to discuss topics on general Xilinx products, applications and solutions.
Latest Thread - What's going on with Xilinx TechSupport
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Forum Usage
A board to discuss topics on froum features and usages.
Latest Thread - Multimicroblaze System-ERRORS
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141 |
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Virtex® Family FPGAs
A board to discuss topics on Virtex® Family FPGAs, including Virtex-5 Multi-Platform FPGA, Virtex-4 Multi-Platform FPGA, Virtex-II Pro Platform FPGA, Virtex-II Platform FPGA, Virtex/E/EM etc.
Latest Thread - Using asynchronous Addr and Din Block RAM inputs
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Spartan® Family FPGAs
A board to discuss topics on Spartan® Family FPGAs, including Spartan-3A DSP, Spartan-3AN, Spartan-3A, Spartan-3E, Spartan-3, Spartan-IIE, Spartan-II, Spartan/XL etc.
Latest Thread - Xilinx Spartan-3a - The problem of Bootloader
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CPLDs
A board to discuss topics on Xilinx CPLDs, including the CoolRunner™-II, CoolRunner XPLA3. and the XC9500/XL/XV device families.
Latest Thread - N and L version ???
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Others
A board to discuss topics on Configuration PROMs, EasyPath™ Series etc.
Latest Thread - Program multiple devices on a board
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312 |
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Installation
A board to discuss topics involving installation, updates, and operating system support for all products in the ISE Design Suite™.
Latest Thread - Ise 11 licensing: Disappointed in Xilinx
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481 |
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Design Entry
A board to discuss topics involving Xilinx tools for design entry and management, including Project Navigator™, Core Generator™, and StateCAD™ etc.
Latest Thread - coregen -- "NGC output will not be generated"
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Simulation and Verification
A board to discuss topics involving simulation and verification tools and flows, including ISE Simulator™, 3rd party simulators, and formal verification.
Latest Thread - For loop excecution
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896 |
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Synthesis
A board to discuss topics involving HDL synthesis tools and practices, including XST™, 3rd party synthesis tools, HDL coding practices and tips.
Latest Thread - ERROR:Xst:872
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Implementation
A board to discuss topics involving design implementation tools and practices, including Translate, Map, Place and Route, SmartXplorer, and FPGA Editor .
Latest Thread - Multithreading map and par in ISE 11.2 for Windows
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575 |
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Timing Analysis
A board to discuss topics involving timing analysis including tools and best practices, including Timing Analyzer™, TRACE™, Timing Constraints, and Speed Files.
Latest Thread - A few general timing questions
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332 |
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PlanAhead
A board to discuss topics involving PlanAhead tools and flows, including pin planning, floorplanning, TimeAhead, DesignAhead, and advanced design debugging.
Latest Thread - Fault tolerance in FPGA’s via partial reconfiguration
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Others
A discussion board for tools not covered by the other existing boards including ChipScope Pro, XPower Analyzer, iMPACT, and others.
Latest Thread - Exposing signals with chipscope.
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Old ISE Board -- no new thread
A board to discuss topics on ISE™ Foundation™, ISE™ WebPACK™, including design entry, Synthesis, Implementation etc.
Latest Thread - How can i use UART and Block RAM by XC3s50an
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EDK and Platform Studio
A board to discuss topics on Platform Studio Integrated Development Environment (IDE),Platform Studio Software Development Kit (SDK), Embedded Systems Compiler and Debugger Tools, Board Support Package (BSP) generation, Operating System etc.
Latest Thread - u-boot bootloader on custom board with V4FX60
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Embedded Processing
A board to discuss topics on Embedded IP cores inlcuding MicroBlaze, PPC, PLB, OPB, GPIO, UART, Ethernet, EMC controller, SDR/DDR Controller etc.
Latest Thread - Master BPI Up Mode in spartan 3A starter kit
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Embedded Linux
This board contains discussions about embedded Linux which runs on Xilinx FPGAs and is based on Open Source Linux and Commerical Linux from other vendors.
Latest Thread - Can I down the CPU frequency?
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PicoBlaze
A board to discuss topics on PicoBlaze
Latest Thread - Multiple PicoBlaze design: Problem in using PB_BMM and XDL
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592 |
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DSP Tools
A board to discuss topics on System Generator for DSP and AccelDSP™
Latest Thread - Blurred image output of LVDS camera------plz help
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Digital Signal Processing
A board to discuss topics on DSP IP Cores and Algorithms etc.
Latest Thread - fir ip core output dout is signed or unsigned?
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Xilinx Boards and Kits
A board to discuss topics on Xilinx development and expansion boards.
Latest Thread - JTAG connection with Platform Cable USB II from CentOS 5 on VirtualBox running under Windows XP
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Others
A board to discuss topics on Third Party and other vender's development and expansion boards.
Latest Thread - Xilinx USB cable connection issue
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156 |
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PCI Express
A board to discuss topics on PCI Express.
Latest Thread - Virtex-5 Integrated Endpoint Block user guide
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979 |
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Connectivity
A board to discuss topics on connectivity IP cores including PCI PCI-X, RapidIO, SPI-4.2, SPI-3, GEMAC etc
Latest Thread - Can I use the LogiCore PCI on multiple machines??
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Others
A board to discuss topics on IP other than DSP, Embedded and Connectivity, including Memory Interface, Distributed Memory etc.
Latest Thread - how to decide the output bits of multipliers in DDC and DUC design
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