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--- Win Prizes for Kudos! ---
From now on, every time you provide a good solution or post valuable information on Xilinx User Community Forums, you will be awarded Special Kudos by the Forum Administrators. Every six months, the top two Kudos winners will receive a very special prize from Xilinx! So, for a chance to claim your well-earned reward, please continue to reply to questions and post elite messages on our Forums. Your contributions are always appreciated!
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PLD Blog
Latest Article - Helping the Customer Drive to ‘Zero Defects’
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General Technical Discussion
A board to discuss topics on general Xilinx products, applications and solutions.
Latest Thread - Looking for documentation of NGC/NGD/NCD file format
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Forum Usage
A board to discuss topics on forum features and usage.
Latest Thread - DDR2 Timing Constraints
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156 |
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Virtex® Family FPGAs
A board to discuss topics on Virtex® Family FPGAs, including Virtex-5 Multi-Platform FPGA, Virtex-4 Multi-Platform FPGA, Virtex-II Pro Platform FPGA, Virtex-II Platform FPGA, Virtex/E/EM etc.
Latest Thread - Help a FPGA first timer
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Spartan® Family FPGAs
A board to discuss topics on Spartan® Family FPGAs, including Spartan-3A DSP, Spartan-3AN, Spartan-3A, Spartan-3E, Spartan-3, Spartan-IIE, Spartan-II, Spartan/XL etc.
Latest Thread - Error when flashing a partial bitstream with iMPACT
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4129 |
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CPLDs
A board to discuss topics on Xilinx CPLDs, including the CoolRunner™-II, CoolRunner XPLA3. and the XC9500/XL/XV device families.
Latest Thread - XC95144XL- Unused Pins connected to other devices
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Others
A board to discuss topics on Configuration PROMs, EasyPath™ Series etc.
Latest Thread - pin 79 of System ACE controller chip
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353 |
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Installation
A board to discuss topics involving installation, updates, and operating system support for all products in the ISE Design Suite™.
Latest Thread - Swithing between Xilinx ISE versions using setx.exe
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839 |
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Design Entry
A board to discuss topics involving Xilinx tools for design entry and management, including Project Navigator™, Core Generator™, and StateCAD™ etc.
Latest Thread - can't get message filter to work
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765 |
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Simulation and Verification
A board to discuss topics involving simulation and verification tools and flows, including ISE Simulator™, 3rd party simulators, and formal verification.
Latest Thread - Testbench used for functional simulations can not be selected when swithing over to Post Map and Post Route simulations in ISE 11.3
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1368 |
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Synthesis
A board to discuss topics involving HDL synthesis tools and practices, including XST™, 3rd party synthesis tools, HDL coding practices and tips.
Latest Thread - XST command line mode
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1440 |
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Implementation
A board to discuss topics involving design implementation tools and practices, including Translate, Map, Place and Route, SmartXplorer, and FPGA Editor .
Latest Thread - design using floorplanner
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881 |
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Timing Analysis
A board to discuss topics involving timing analysis including tools and best practices, including Timing Analyzer™, TRACE™, Timing Constraints, and Speed Files.
Latest Thread - Jitter in hold time analysis?
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PlanAhead
A board to discuss topics involving PlanAhead tools and flows, including pin planning, floorplanning, TimeAhead, DesignAhead, and advanced design debugging.
Latest Thread - Busmacro with enabled input in PlanAhead flow
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Others
A discussion board for tools not covered by the other existing boards including ChipScope Pro, XPower Analyzer, iMPACT, and others.
Latest Thread - Where can I get a slice about the encryption operation while generatie BIT file
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Old ISE Board -- no new thread
A board to discuss topics on ISE™ Foundation™, ISE™ WebPACK™, including design entry, Synthesis, Implementation etc.
Latest Thread - How can i use UART and Block RAM by XC3s50an
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4887 |
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EDK and Platform Studio
A board to discuss topics on Platform Studio Integrated Development Environment (IDE),Platform Studio Software Development Kit (SDK), Embedded Systems Compiler and Debugger Tools, Board Support Package (BSP) generation, Operating System etc.
Latest Thread - My XPS timer fails to work
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11451 |
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Embedded Processing
A board to discuss topics on Embedded IP cores inlcuding MicroBlaze, PPC, PLB, OPB, GPIO, UART, Ethernet, EMC controller, SDR/DDR Controller etc.
Latest Thread - Interrupt from custom PLB peripheral
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Embedded Linux
This board contains discussions about embedded Linux which runs on Xilinx FPGAs and is based on Open Source Linux and Commerical Linux from other vendors.
Latest Thread - Beginners help to building a Linux Kernel for the PPC
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PicoBlaze
A board to discuss topics on PicoBlaze
Latest Thread - More basic than "hello world", this bare bones intro project blinks a single LED.
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756 |
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DSP Tools
A board to discuss topics on System Generator for DSP and AccelDSP™
Latest Thread - simulink system period effect in HDL netlist generation
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2058 |
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Digital Signal Processing - IP and Algorithms
A board to discuss error correction, filtering, telecommunications, wireless, Digital Signal Processing, mathematical functions, multimedia, video and imaging IPs and usage of XtremeDSP slice
Latest Thread - Problem with CORDIC 3.0 square root outputs
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Xilinx Boards and Kits
A board to discuss topics on Xilinx development and expansion boards.
Latest Thread - Problem about Initialising instruction of character LCD screen on Spartan 3E starter kit
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Others
A board to discuss topics on Third Party and other vender's development and expansion boards.
Latest Thread - Loading an FPGA
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190 |
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PCI Express
A board to discuss topics on PCI Express.
Latest Thread - Endpoint "forgets" mapping after core reload
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1168 |
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Connectivity
A board to discuss topics on connectivity IP cores including PCI PCI-X, RapidIO, SPI-4.2, SPI-3, GEMAC etc
Latest Thread - PCI Bridge configuration help needed
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Others
A board to discuss topics on IP other than DSP, Embedded and Connectivity, including Memory Interface, Distributed Memory etc.
Latest Thread - Ise Error in DDR2 SDRAM Control for Spartan6
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| Announcements |
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