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Observer zhuangzhuang
Observer
187 次查看
注册日期: ‎11-18-2018

hdmi_tx ip综合时的error

转到解答

我在综合v_hdmi_tx这个IP的only tx example design时有一个错误,我不知道该如何解决。

Screenshot from 2018-12-10 08-30-58.png 

error信息为:

[Common 17-179] Fork failed: Cannot allocate memory

我查看去其中一个design的log,如exdes_hdmi_acr_ctrl_0_synth_1,

它的log(部分):

*** Running vivado
with args -log exdes_hdmi_acr_ctrl_0.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source exdes_hdmi_acr_ctrl_0.tcl


****** Vivado v2018.2 (64-bit)
**** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
**** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

source exdes_hdmi_acr_ctrl_0.tcl -notrace
Command: synth_design -top exdes_hdmi_acr_ctrl_0 -part xczu7ev-ffvc1156-2-e -mode out_of_context
Starting synth_design
Attempting to get a license for feature 'Synthesis' and/or device 'xczu7ev'
INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xczu7ev'
INFO: Launching helper process for spawning children vivado processes
INFO: Helper process launched with PID 5213
---------------------------------------------------------------------------------
Starting RTL Elaboration : Time (s): cpu = 00:00:03 ; elapsed = 00:00:04 . Memory (MB): peak = 1282.746 ; gain = 88.906 ; free physical = 2560 ; free virtual = 5024
---------------------------------------------------------------------------------
INFO: [Synth 8-6157] synthesizing module 'exdes_hdmi_acr_ctrl_0' [/home/linux441/v_hdmi_tx_ss_0_ex/v_hdmi_tx_ss_0_ex.srcs/sources_1/bd/exdes/ip/exdes_hdmi_acr_ctrl_0/synth/exdes_hdmi_acr_ctrl_0.v:58]
INFO: [Synth 8-638] synthesizing module 'hdmi_acr_ctrl' [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_ctrl.vhd:60]
INFO: [Synth 8-3491] module 'hdmi_acr_ctrl_top' declared at '/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_ctrl_top.sv:35' bound to instance 'hdmi_acr_ctrl_top_inst' of component 'hdmi_acr_ctrl_top' [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_ctrl.vhd:123]
INFO: [Synth 8-6157] synthesizing module 'hdmi_acr_ctrl_top' [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_ctrl_top.sv:35]
INFO: [Synth 8-5534] Detected attribute (* async_reg = "true" *) [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_ctrl_top.sv:84]
INFO: [Synth 8-6157] synthesizing module 'hdmi_acr_ctrl_axi' [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_ctrl_axi.sv:36]
Parameter pVERSION_NR bound to: -559038737 - type: integer
Parameter cAXI4_RESP_OKAY bound to: 2'b00
Parameter cAXI4_RESP_SLVERR bound to: 2'b10
Parameter cADDR_VER bound to: 0 - type: integer
Parameter cADDR_CTRL bound to: 4 - type: integer
Parameter cADDR_CTSVAL bound to: 8 - type: integer
Parameter cADDR_NVAL bound to: 12 - type: integer
INFO: [Synth 8-6155] done synthesizing module 'hdmi_acr_ctrl_axi' (1#1) [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_ctrl_axi.sv:36]
WARNING: [Synth 8-689] width (32) of port connection 'S_AXI_AWADDR' does not match port width (8) of module 'hdmi_acr_ctrl_axi' [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_ctrl_top.sv:129]
WARNING: [Synth 8-689] width (32) of port connection 'S_AXI_ARADDR' does not match port width (8) of module 'hdmi_acr_ctrl_axi' [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_ctrl_top.sv:142]
INFO: [Synth 8-6157] synthesizing module 'hdmi_acr_lib_pulse_clkcross' [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_lib.sv:30]
INFO: [Synth 8-6155] done synthesizing module 'hdmi_acr_lib_pulse_clkcross' (2#1) [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_lib.sv:30]
INFO: [Synth 8-6157] synthesizing module 'hdmi_acr_lib_data_clkcross' [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_lib.sv:62]
Parameter pDATA_WIDTH bound to: 32 - type: integer
INFO: [Synth 8-6155] done synthesizing module 'hdmi_acr_lib_data_clkcross' (3#1) [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_lib.sv:62]
INFO: [Synth 8-6155] done synthesizing module 'hdmi_acr_ctrl_top' (4#1) [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_ctrl_top.sv:35]
INFO: [Synth 8-256] done synthesizing module 'hdmi_acr_ctrl' (5#1) [/home/linux441/v_hdmi_tx_ss_0_ex/imports/hdmi_acr_ctrl.vhd:60]
INFO: [Synth 8-6155] done synthesizing module 'exdes_hdmi_acr_ctrl_0' (6#1) [/home/linux441/v_hdmi_tx_ss_0_ex/v_hdmi_tx_ss_0_ex.srcs/sources_1/bd/exdes/ip/exdes_hdmi_acr_ctrl_0/synth/exdes_hdmi_acr_ctrl_0.v:58]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_axi has unconnected port S_AXI_WSTRB[3]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_axi has unconnected port S_AXI_WSTRB[2]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_axi has unconnected port S_AXI_WSTRB[1]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_axi has unconnected port S_AXI_WSTRB[0]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[31]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[30]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[29]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[28]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[27]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[26]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[25]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[24]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[23]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[22]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[21]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[20]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[19]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[18]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[17]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[16]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[15]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[14]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[13]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[12]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[11]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[10]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[9]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_awaddr[8]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[31]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[30]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[29]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[28]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[27]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[26]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[25]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[24]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[23]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[22]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[21]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[20]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[19]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[18]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[17]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[16]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[15]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[14]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[13]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[12]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[11]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[10]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[9]
WARNING: [Synth 8-3331] design hdmi_acr_ctrl_top has unconnected port axi_araddr[8]
---------------------------------------------------------------------------------
Finished RTL Elaboration : Time (s): cpu = 00:00:05 ; elapsed = 00:00:07 . Memory (MB): peak = 1326.371 ; gain = 132.531 ; free physical = 4224 ; free virtual = 6700
---------------------------------------------------------------------------------

Report Check Netlist:
+------+------------------+-------+---------+-------+------------------+
| |Item |Errors |Warnings |Status |Description |
+------+------------------+-------+---------+-------+------------------+
|1 |multi_driven_nets | 0| 0|Passed |Multi driven nets |
+------+------------------+-------+---------+-------+------------------+
---------------------------------------------------------------------------------
Start Handling Custom Attributes
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Handling Custom Attributes : Time (s): cpu = 00:00:05 ; elapsed = 00:00:07 . Memory (MB): peak = 1326.371 ; gain = 132.531 ; free physical = 4158 ; free virtual = 6635
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:05 ; elapsed = 00:00:07 . Memory (MB): peak = 1326.371 ; gain = 132.531 ; free physical = 4158 ; free virtual = 6635
---------------------------------------------------------------------------------
INFO: [Device 21-403] Loading part xczu7ev-ffvc1156-2-e
INFO: [Project 1-570] Preparing netlist for logic optimization

Processing XDC Constraints
Initializing timing engine
Completed Processing XDC Constraints

INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

WARNING: [Constraints 18-5210] No constraint will be written out.
Constraint Validation Runtime : Time (s): cpu = 00:00:00.14 ; elapsed = 00:00:00.31 . Memory (MB): peak = 2395.750 ; gain = 0.000 ; free physical = 129 ; free virtual = 1755
---------------------------------------------------------------------------------
Finished Constraint Validation : Time (s): cpu = 00:00:32 ; elapsed = 00:00:57 . Memory (MB): peak = 2395.750 ; gain = 1201.910 ; free physical = 193 ; free virtual = 1876
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Loading Part and Timing Information
---------------------------------------------------------------------------------
Loading part: xczu7ev-ffvc1156-2-e
---------------------------------------------------------------------------------
Finished Loading Part and Timing Information : Time (s): cpu = 00:00:32 ; elapsed = 00:00:57 . Memory (MB): peak = 2395.750 ; gain = 1201.910 ; free physical = 193 ; free virtual = 1876
---------------------------------------------------------------------------------

 

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Moderator
Moderator
161 次查看
注册日期: ‎08-02-2007

回复: hdmi_tx ip综合时的error

转到解答

可以打开HDMI TX only的example design比如你的设计和example design, example design本身是没有问题的.

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1 条回复1
Moderator
Moderator
162 次查看
注册日期: ‎08-02-2007

回复: hdmi_tx ip综合时的error

转到解答

可以打开HDMI TX only的example design比如你的设计和example design, example design本身是没有问题的.

0 项奖励