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Visitor asmao
Visitor
14,815 Views
Registered: ‎02-08-2013

Configuring Clocks on Nexys 4

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Hello,

 

I currently have a single 100 MHz clock (clk) configured on a Nexys 4 and I'm trying to configure a second 4 MHz (clk_ctrlr) clock but I'm having difficulty configuring clk_ctrlr. I currently have the Nexys 4 XDC constraints file loaded and have uncommented the clk that is attached to pin E3 (100 MHz oscillator) as well as other properties I needed.

 

Given I'm using Vivado (2014.2), I followed the Creating Basic Clock constraints video instructions. Here are the steps I took:

1) Inside of Synthesized Design clicked: Edit Timing Constraints.

2) Clicked on create timing constraints icon -> Clocks -> Create Clock.

3) Entered: clk_ctrlr into the clock name.

4) Opened up: Source Objects. Clicked find and then found the clk_ctrlr input from my topmost module.

5) I then hit the green arrow to move it to the selected names box. Hit OK.

6) I set the waveform (250 ns period). I also checked add this clock to the existing clock (no overwriting).

 

I hit ok, apply, save constraints, reran synthesis, ran implimentation, and tried to generate bitstream.

 

However, while running the implimentation I ran into the following 2 errors: "[Drc 23-20] Rule violation (NSTD-1)" and "Drc 23-20] Rule violation (UCIO-1)" with both pointing to clk_ctrlr as the only problem port (1 out of 69 ports).

 

I understand that this means that I need to set the IOSTANDARD and LOC but I'm not exactly sure what to set the LOC for the clock.

 

I looked at the Nexys4_master.xdc at the clk for inspiration and noticed that its PACKAGE_PIN was E3. However, E3 is directly linked to a 100 MHz oscillator. Hence, it makes little sense to assign the same pin to clk_ctrlr.

 

I'm wondering, what pin should I assign to clk_ctrlr for the Nexys 4?

 

Thank you,

Alvin

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Xilinx Employee
Xilinx Employee
24,068 Views
Registered: ‎01-03-2008

Re: Configuring Clocks on Nexys 4

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The create clock function is a design timing constraint that instructs the tool that logic connected to the net must operate at the defined frequency. This does not create a physical clock at the defined frequency.

 

You have indicated that the board that you are using does not have a 4 MHz clock source, so you must derive this frequency from another physical clock that is available. The easiest way to do this is with the Clock Wizard IP core. 

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Xilinx Employee
Xilinx Employee
14,806 Views
Registered: ‎01-03-2008

Re: Configuring Clocks on Nexys 4

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It sounds like you want to use the 4MHz clock internally in your design, but have somehow connected it to an output port. Check the settings that you used when running the clock wizard and how you instantiated the core in your design.

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Visitor asmao
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14,798 Views
Registered: ‎02-08-2013

Re: Configuring Clocks on Nexys 4

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So, the purpose of the 4 MHz clock is to send a request to a video game controller while the console itself runs at 100 MHz. Hence, I would like to output data through a PMOD pin at 4 MHz so I guess in that sense I am intentionally connecting a 4 MHz to an output port. Is this not allowed?

 

If not what solution would you suggest?

 

Thanks

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Xilinx Employee
Xilinx Employee
14,781 Views
Registered: ‎01-03-2008

Re: Configuring Clocks on Nexys 4

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Your original post appeared to be confused about signing the clock to an IO location, but your last post had indicated that you are planning to use the PMOD connector on the board, so obviously you should be using one of those pins for the location assignment.

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Visitor asmao
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14,775 Views
Registered: ‎02-08-2013

Re: Configuring Clocks on Nexys 4

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I did assign a serial out to one of the PMOD connectors on the board.

 

If you are suggesting that the pin/LOC that I need to assign to the clk_ctrlr is also the PMOD connector that I hooked to serial out, I didn't feel this was so obvious as the LOC for the original 100 MHz clock was assigned to a pin, E3, which according to the schematic was the 100 MHz built in oscillator. This assignment obviously makes sense given you're assigning a clk to an oscillator.

 

However, I don't quite see how assigning an PMOD pin for clock_ctrlr is obvious given PMOD is an IO pin.

 

Could you clarify to me how this works out?

 

I will try this out and update accept this as the solution if everything works out.

 

Thank you,

Alvin

 

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Xilinx Employee
Xilinx Employee
14,765 Views
Registered: ‎01-03-2008

Re: Configuring Clocks on Nexys 4

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Again, I am confused by what your problem is. If you need a 4 MHz clock output for your game controller then obviously you need to assign it to the IO pin that will be connected to the game controller. If you don't need this then the 4 MHz clock should not be defined as an output in your system. If the 4 MHz clock is only used for the interface inputs and outputs and is not required by the interface then it should not be an output from your design.

 

The 100MHz clock that you have also referred to is an input to your design and is sourced by the oscillator that is on the PCB. My understanding is that this is the source of your 4 MHz clock with a MMCM dividing the 100 MHz down to 4 KHz.

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Visitor asmao
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14,761 Views
Registered: ‎02-08-2013

Re: Configuring Clocks on Nexys 4

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In the top level module, the 4 MHz clock is not supposed to act as a clock for the controller.

 

It instead governs the frequency at which a signal (this signal is requesting data) should be sent to the controller.

 

Hence, in the top level module the 4 MHz clock is never assigned to an output port and only the requesting signal to the controller which is running at 4 MHz is wired to the output port.

 

However, I did assign the 4 MHz clock to an input port in my top most module after seeing that the original 100 MHz clk was also assigned as an input port.

 

The way I configured of the 4 MHz is detailed in my first post. I've never heard of MMCM but I'll look into into it.

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Visitor asmao
Visitor
14,759 Views
Registered: ‎02-08-2013

Re: Configuring Clocks on Nexys 4

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Given there seems to be some confusion about my problem, I'll try to clarify here.

 

My end goal is to create a 4 MHz clock which will enable me to send a signal at 4 MHz to a controller.

 

To create this second clock, using Vivado 2014.2, I opened the Synthesized Design -> Edit Timing Constraints -> Create Clock -> Added my specifications. The full steps are specified in my first post.

 

After I do this, inside of my constraints XDC file I can see my other clock there:

create_clock -add -name clk_ctrlr -period 250.0 -waveform {0 125} [get_ports clk_ctrlr]

 

When I try to run the bitstream, I hit the following 2 errors:  "[Drc 23-20] Rule violation (NSTD-1)" and "Drc 23-20] Rule violation (UCIO-1)".

 

So my means to my end goal listed above is to try to get these 2 errors to go away.

 

I was able to get the DRC 23-20 NSTD-1 to go away by setting the IOSTANDARD to LVCMOS33.

 

However, I don't know what to do about DRC 23-20 UCIO-1. It states that I need to assign it to some LOC and looking at the existing 100 MHz clock in the XDC file, I see that its assigned to a pin E3 which correspond to a 100 MHz oscillator. This pin assignment makes a lot of sense given E3 is a 100 MHz pin.

 

Now, I don't know what pin to assign to my 4 MHz clock because there is no on-board 4 MHz clock and I can very easily foresee myself creating various other clocks hence I need to figure out how to properly configure another clock.

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Xilinx Employee
Xilinx Employee
24,069 Views
Registered: ‎01-03-2008

Re: Configuring Clocks on Nexys 4

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The create clock function is a design timing constraint that instructs the tool that logic connected to the net must operate at the defined frequency. This does not create a physical clock at the defined frequency.

 

You have indicated that the board that you are using does not have a 4 MHz clock source, so you must derive this frequency from another physical clock that is available. The easiest way to do this is with the Clock Wizard IP core. 

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com
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Visitor asmao
Visitor
14,701 Views
Registered: ‎02-08-2013

Re: Configuring Clocks on Nexys 4

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Thank you very much, I'll ask questions in a separate post if I run into problems with the Clock Wizard IP Core.

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