02-26-2018 06:38 AM
I am trying to send a clock signal out of my Arty S7 board over LVDS. I have done the following steps to try to get LVDS output:
After all this, I still get 0V output. Are there any steps that I am missing? I have checked that the pin can send out single-ended data without issue.
02-26-2018 07:29 AM
02-26-2018 07:34 AM
Yes I am setting location constraints for all the pins. I have not seen any critical warnings during synthesis or implementation.
02-26-2018 11:23 AM
02-26-2018 01:39 PM
Yes I am sure the clock is running. I changed the I/O standard from LVDS to LVCMOS and I was able to measure the single ended clock at the output. As far as what is connected to it: I currently have a 100 ohm termination resistor across the P and the N pins and have set "Off-Chip termination" to FD_100 in the I/O Ports tab.
02-26-2018 01:41 PM
I'd try it outside of IPI then If I was you just to make sure the utility buffer is not the cause of it.
02-26-2018 01:52 PM
As far as I know the OBUFDS utility buffer from the IP integrator is the way to create differential output. Could you please explain how to setup LVDS output without using the IP integrator?
02-28-2018 02:27 PM
03-07-2018 03:14 PM - edited 03-07-2018 03:26 PM
@kevin.wenger The Banks are powered off 3.3V on the S7 board and hence LVDS_25 is not a valid output setting.