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amaganti
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Registered: ‎01-27-2020

Custom hardware with zynq 7035, looking for documentation on XSA file creation

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Looking to create a FSBL for my custom hardware with Xilinx 7035.

Realized that I have to have my Board File for the custom hardware to create a BIL file

  • Using Vitis I was sucessful creating a FSBL for 702 Zynq Board

What steps do I need to follow to create FSBL from scratch. Where I haven't yet created a device tree.

 

Thanks

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denist
Xilinx Employee
Xilinx Employee
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Registered: ‎10-11-2011

When dealing with custom boards I usually start from a Vivado project.

Drop the PS block in the IP Integrator canvas and configure the PS (including DDR) to match your board (MIO, Clocks, etc...)

After you export the XSA you can ask Vitis to build a Platform based on it.

Is this what you are looking for?

 

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denist
Xilinx Employee
Xilinx Employee
556 Views
Registered: ‎10-11-2011

When dealing with custom boards I usually start from a Vivado project.

Drop the PS block in the IP Integrator canvas and configure the PS (including DDR) to match your board (MIO, Clocks, etc...)

After you export the XSA you can ask Vitis to build a Platform based on it.

Is this what you are looking for?

 

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Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------

View solution in original post

amaganti
Visitor
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514 Views
Registered: ‎01-27-2020

Yes, I was missing this. Device tree can be genrated using vitis I assume?

Wondering what is Appendix Board Interface File section in the below document.

 https://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_1/ug895-vivado-system-level-design-entry.pdf

This Guide also helps. I was looking for this.

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug1165-zynq-embedded-design-tutorial.pdf

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