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fincs
Adventurer
Adventurer
391 Views
Registered: ‎03-21-2016

Sometimes don't start Zynq

Hello!

I'm have a custom board with Zynq 30, two 2 Gbit Micron flash in dual-stacked mode. Sometimes Zynq don't load bitstream and user app. 

Two situations are repeated:

Xilinx First Stage Boot Loader 

Release 2019.2	Jan 13 2021-16:33:47
Silicon Version 3.1
Boot mode is QSPI

Single Flash Information
FlashID=0x20 0xBB 0x22
MICRON 2G Bits
QSPI is in Dual Stack connection
QSPI is in 4-bit mode
Reboot status register: 0x60400000
Multiboot Register: 0x0000C000
Image Start Address: 0x00000000
stacked - lower CS 

stacked - lower CS 
Partition Header Offset:0xFF000000
stacked - upper CS 

Bank Selection 239

BankSel 239 != Register Read 15

Bank Selection Failed

FSBL Status = 0xA00E

And

Release 2019.2	Jan 13 2021-16:33:47
Silicon Version 3.1
Boot mode is QSPI

Single Flash Information
FlashID=0x20 0xBB 0x22
MICRON 2G Bits
QSPI is in Dual Stack connection
QSPI is in 4-bit mode
Reboot status register: 0xF0480000
Multiboot Register: 0x0000C200
Image Start Address: 0x01000000
Bank Selection 1

stacked - lower CS 

Bank Selection 1

stacked - lower CS 

Partition Header Offset:0xFF1C7361
stacked - upper CS 

Bank Selection 239

BankSel 239 != Register Read 15

Bank Selection Failed

FSBL Status = 0xA00E

What could be the problem?

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2 Replies
savula
Moderator
Moderator
232 Views
Registered: ‎10-30-2017

Hi @fincs ,

The FSBL error status 0xA00E indicates it failed to get the boot header. there might be some issue with the boot header. Please check the bif file once (if possible please share it). Also use Bootgen utility command to check whether the image created correctly or not.

Best Regards,

Srikanth

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fincs
Adventurer
Adventurer
181 Views
Registered: ‎03-21-2016

Hi @savula 

 

The image is formed using the command Bootgen. The bif file contains a FSBL and a bitstream. 

So far, the problem has been solved as follows: 

In a file qspi.c in a function u32 QspiAccess( u32 SourceAddress, u32 DestinationAddress, u32 LengthBytes)  was added 

u8 BankSwitchFlag = 1; 

Status = SendBankSelect(0); // <=

/*
 * Linear access check
 */
if (LinearBootDeviceFlag == 1) {


And the processor turned on better.

Later, SendBankSelect(0) was removed, was added

u8 BankSwitchFlag = 1; 

if (QspiFlashMake == MICRON_ID || QspiFlashMake == MACRONIX_ID) {
		WriteBuffer[COMMAND_OFFSET]   = EXTADD_REG_RD;
		WriteBuffer[ADDRESS_1_OFFSET] = 0x00;

		/*
		 * Send the Extended address register write command
		 * written, no receive buffer required
		 */
		Status = XQspiPs_PolledTransfer(QspiInstancePtr, WriteBuffer, ReadBuffer,
				BANK_SEL_SIZE);
		if (Status != XST_SUCCESS) {
			return XST_FAILURE;
		}
	} 

	/*
	 * Linear access check
	 */

The power-on error still did not appear. There were about 100 restarts in a row.

Later, read a Extended Address Register was removed, was added read Device ID. The inclusion error appeared.

 

Currently added to function SendBankSelect(0) call and Extended Address Register reading. There have been no errors yet, we are waiting. The bif file did not change in the process.

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