Hi We have issue when we try configure the FPGA from QSPI Flash. The FPGA is XCZU3EG-1SFVC784IES9819, The Flash is Micron MT25QL01GBBB8E12-0SIT (In the approved list of Xilinx) Attached schematics, we work at single mode (Only U59) The issue we have is that FPGA load FSBL from Flash (QSPI) is stuck after stage 2 during Flash ID read. When we configure the FPGA via JTAG, it is always O.K. Boot Mode is QSPI24. I measured voltages to see drop when it is stuck – I didn’t see drop below ~10% (VCC_3V, VCC_INT_085V, VCC_PSINT_085V, VCC_AUX_1V8) Status right now: • we are working with 18.1 • we have PS UART and we see all prints (UART0) • we can see that process stuck after Stage2 in xfsbl when trying to compare Device ID (Manufacturer ID, Memory Type and Memory Capacity) (See attached Device ID spec.) From some reason we got all zeros and process stuck. Here is a print of UART: Xilinx Zynq MP First Stage Boot Loader Release 2018.1 May 22 2018 - 14:35:17 Reset Mode : System Reset Platform: Silicon (4.0), Cluster ID 0x80000000 Running on A53-0 (64-bit) Processor, Device Name: XCZU3EG Processor Initialization Done ================= In Stage 2 ============ QSPI 24bit Boot Mode QSPI is in single flash connection QSPI is using 4 bit bus TryAGain FlashID=0x0 0x0 0x0 It seems that we starting work with Flash via QSPI (FPGA success load program of fsbl from flash) So connectivity of flash to FPGA is right. Pls. advise.
