06-25-2018 02:33 AM
Hello,
I receive new hardware, where I did the initial test by booting it up in QSPI (mode set by switch) . This worked fine.
Then I made my own .mcs file by adding
This way I add the bootloader
This way I create the bootloader
After flashing the .mcs (QSDI mode according to switched ON OFF ON ON)file the program does not work i.e. the fpga is not able to initiate
The same software if I flash without bootloader in jatag mode (pins configured) i.e first flash fpga file (.bit) and then flash PS software (.elf) then it works fine. Therefore I think there is a problem in bootloader file
Please let me know if I miss some step for making bootloader file for board ZCU106.
Thank you
Best regards
09-06-2018 12:38 AM
process :
1. check jumper for pcie to enable
2. make loop pcie PL implementation with xdma pcie IP
3. flash it into the flash memory with "qspi_dual_parallel" option or make boot image (fsbl + elf) and place in sd card
4. run xilinx driver for pcie in ubuntu 14.0
https://www.xilinx.com/support/answers/65444.html
project (.tcl) and boot image in the attachment
note : there is user ip to control LED (single_endto_diff_0), hence if that user IP is not loaded in the project no need to worrie :)
how to place pcie:
1. include xdma pcie
2. run auto setup
(select maximum width, stream, 1 connection )
3. then connect out stream to in stream (loop back)
4. change the pins for pcie in IO planner (as it is not corectly done automatically)
5. assign the input pcie clock in clock planner to 100Mhz.
6. make .bit file
7. export to sdk
8. make fsbl
9. make boot image
10. correct jumper setting in the board
11. conent the board to pcie slot in pc with ubuntu 14.0
12. check in the linux (lspci -v), as xilinx pcie
13. run the xilinx driver
All the best
06-25-2018 04:09 AM
06-27-2018 06:12 AM
here is what I see in
Xilinx Zynq MP First StagýXilinx Zynq MP First Stage Boot Loader
Release 2018.1 þXilinx Zynq MP First SüXilinx Zynq MP First Sü
I even tried simple hello world but that also does not work.
Please see the flash log in the attachment.
I have this problem with both hardware (2 ZCu106)
06-27-2018 06:13 AM
When I flash the file from the restore flash tutorial, then it works fine. but still, multiple restarts require to get to green lights.
So I do not understand where is the problem.
06-28-2018 02:43 AM
Ther is another msg states PMU is disabled hence some function won't work properly?
Will that created problem?
06-28-2018 04:20 AM
I ran the bootloader in debug mode, there I found this error
XFsbl_SpkVer: XFSBL_ERROR_SPK_SIGNATURE
Failure at boot header authentication
It seems there is a problem in FSBL generated from SDK for zynq ultrascale+ board ZCU106.
Please advice how to resolve it.
thank you
06-28-2018 04:45 AM
06-29-2018 01:03 PM
I also see this error in your log "XFSBL_ERROR_IHT_CHECKSUM".
It appears the image is corrupted in the "image header table".
07-03-2018 01:03 AM
09-05-2018 06:56 PM
Hi! Now I work on ZCU106,and I add a DMA/Subsystem for pci express IPCore at PL. But wen I boot form SD card,kernel stop at [ 0.015866] bootconsole [cdns0] disabled.
As you say,your model also have pcie,and work well in SD card mode.Can you gave me a example design with PCIE?I hope it can help me to find out where is wrong,thanks!
09-06-2018 12:38 AM
process :
1. check jumper for pcie to enable
2. make loop pcie PL implementation with xdma pcie IP
3. flash it into the flash memory with "qspi_dual_parallel" option or make boot image (fsbl + elf) and place in sd card
4. run xilinx driver for pcie in ubuntu 14.0
https://www.xilinx.com/support/answers/65444.html
project (.tcl) and boot image in the attachment
note : there is user ip to control LED (single_endto_diff_0), hence if that user IP is not loaded in the project no need to worrie :)
how to place pcie:
1. include xdma pcie
2. run auto setup
(select maximum width, stream, 1 connection )
3. then connect out stream to in stream (loop back)
4. change the pins for pcie in IO planner (as it is not corectly done automatically)
5. assign the input pcie clock in clock planner to 100Mhz.
6. make .bit file
7. export to sdk
8. make fsbl
9. make boot image
10. correct jumper setting in the board
11. conent the board to pcie slot in pc with ubuntu 14.0
12. check in the linux (lspci -v), as xilinx pcie
13. run the xilinx driver
All the best
09-06-2018 12:39 AM
09-06-2018 02:37 AM
When I source the tcl file,I get error:
ERROR: [Vivado 12-172] File or Directory 'C:/Users/TOM/AppData/Roaming/Xilinx/Vivado/PCIeLoop.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd' does not exist
Can you tar the whole project?Thanks!
09-06-2018 02:56 AM
09-29-2020 01:59 PM