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Participant
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Registered: ‎02-05-2019

[Zynq Ultrascale+] How to map the DRAM in ATF (ARM Trusted Firmware)?

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Hi,

What I'm trying to accomplish is to have write access to anywhere in the DRAM from within the ATF.  Ideally I'd like to just map the entire DRAM all at once.  But if this is not possible, then I'd still like to be able to map it dynamically at run time (not merely at ATF init time) one section at a time in order to write to the DRAM.

My first attempt involved adding an entry to plat_arm_mmap[], but this didn't work, and causes the ATF to hang during boot-up.  This is the entry I added:

  •    /* .... */
    { DRAM_BASE, DRAM_BASE, DRAM_SIZE, MT_MEMORY | MT_RW },
       /* .... */
    • (Where DRAM_BASE = 0x00000000 , and DRAM_SIZE = 0x80000000)

Any tips would be appreciated.  Thanks!

Regards,
Yu Fei

 

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Participant
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Registered: ‎02-05-2019

Re: [Zynq Ultrascale+] How to map the DRAM in ATF (ARM Trusted Firmware)?

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Hi,

OK, I've figured out how to do this.  I found where to create an extra mapping:

  • plat/xilinx/zynqmp/aarch64/zynqmp_common.c :
    • plat_arm_mmap[] :
    • + { DRAM_BASE_PA, DRAM_BASE_VA, DRAM_SIZE, MT_NON_CACHEABLE | MT_RW | MT_NS },
  • plat/xilinx/zynqmp/zynqmp_def.h :
    • Needed to add definitions for the above entry:
    • +#define DRAM_BASE_PA 0x00000000
      +#define DRAM_BASE_VA 0x00000000
      +#define DRAM_SIZE 0x80000000
  • plat/xilinx/zynqmp/include/platform_def.h :
    • This was one of the "obscure" changes needed, because the mmap_add_region() function in fact uses a global array, mmap[].  Hence, we must increase the values of MAX_MMAP_REGIONS and MAX_XLAT_TABLES by 1:
    • +#define MAX_MMAP_REGIONS 8
      +#define MAX_XLAT_TABLES 6

And with that, it works.

Regards,
Yu Fei

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Xilinx Employee
Xilinx Employee
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Registered: ‎01-21-2008

Re: [Zynq Ultrascale+] How to map the DRAM in ATF (ARM Trusted Firmware)?

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Hi @yufei.leung,

ATF can access any DRAM location, since it is secure.

From 2018.2 onward there are few option added to compilers for the ATF.

PRELOADED_BL33_BASE=0x8000000

ZYNQMP_ATF_MEM_BASE=0xFFFEA000

ZYNQMP_ATF_MEM_SIZE=0x16000

Try above command over the OSL build or Petalinux 

FYI - How to build OSL with git source?

git clone https://github.com/Xilinx/arm-trusted-firmware.git
cd arm-trusted-firmware
git checkout xilinx-v2019.2
export ARCH=aarch64
make DEBUG=0 RESET_TO_BL31=1 PLAT=zynqmp bl31
make -j 20 CROSS_COMPILE="aarch64-linux-gnu-" PRELOADED_BL33_BASE=0x8000000 ZYNQMP_ATF_MEM_BASE=0xFFFEA000 ZYNQMP_ATF_MEM_SIZE=0x16000 BUILD_BASE=./atf-build PLAT=zynqmp RESET_TO_BL31=1 bl31

***/atf-build directory will have build ATF FW i.e. arm-trusted-firmware\atf-build\zynqmp\release\bl31.bin

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Participant
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Registered: ‎02-05-2019

Re: [Zynq Ultrascale+] How to map the DRAM in ATF (ARM Trusted Firmware)?

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OK, thanks.  How is the DRAM currently being mapped by the ATF?  Physically it is in the interval [0x00000000, 0x80000000), but what Virtual Address is mapped to this?

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Xilinx Employee
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Registered: ‎01-21-2008

Re: [Zynq Ultrascale+] How to map the DRAM in ATF (ARM Trusted Firmware)?

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Hi @yufei.leung,

Currently ATF_FW is loaded as a data which user define partition table via BootGEN (boot.bin). But very important is that  ATF FW uses the OCM fixed location to execute i.e. from 0xFFFEA000 to 0xFFFFFFFF, which we have compiler options set ZYNQMP_ATF_MEM_BASE=0xFFFEA000 from OSL and Petalinux configuration side.

So, the FSBL handoff to the ATF FW code location at the 0xFFFEA000, then once the ATF FW is loaded from OCM successfully from address 0xFFFEA000, then ATF FW hand-off to address 0x8000000 (in DRAM/DDR) to next app i.e. U-BOOT  is located for hand-off address; (while compiling the ATF Via OSL or Petalinux Configuration we set the parameter PRELOADED_BL33_BASE=0x8000000 - which is U-BOOT DRMA location)

So that’s why I mentioned in my first reply, that is, ATF_FW can hand-off to any DRAM address as it works in secure mode. So, the entire DDR/DRMA memory is accessed by ATF for Hand-off.

Have a look some of the address mapping in the UG1137 for more information.

 

 

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Registered: ‎02-05-2019

Re: [Zynq Ultrascale+] How to map the DRAM in ATF (ARM Trusted Firmware)?

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Hi jadhavs,

Thanks for your explanations.  To clarify my situation, right now I have loaded the ATF to DRAM near the end (@0x7fc00000, we have 2GB of DRAM), instead of having the ATF loaded to the OCM.  This was necessary for our application, since we needed to use the OCM for another purpose.

What I'm interested in is not about how to hand-off to the next stage (i.e., u-boot) which resides in DRAM.  We have no problem booting up through the various stages from FSBL to PMUFW to ATF to u-boot.  But rather, what we want to do is access the DRAM from ATF on an SMC call from Linux.  We want to use the ATF to write to the DRAM at any arbitrary DRAM address.  Do you know how we could accomplish this?

For example, we are able to do this from the PMUFW, where I can simply specify to write a value of 0xdeadbeef to address 0x48000000, for example, and it will write to that physical address in the DRAM (which spans from [0,0x80000000)).  But we can't use the PMU because it is too slow for our application... we've benchmarked it and it doesn't have fast enough throughput for our needs.  We wish to use the Cortex A53, which will be fast enough for our needs.

Any ideas?

Thanks!

Regards,
Yu Fei

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Participant
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Registered: ‎02-05-2019

Re: [Zynq Ultrascale+] How to map the DRAM in ATF (ARM Trusted Firmware)?

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Hi,

OK, I've figured out how to do this.  I found where to create an extra mapping:

  • plat/xilinx/zynqmp/aarch64/zynqmp_common.c :
    • plat_arm_mmap[] :
    • + { DRAM_BASE_PA, DRAM_BASE_VA, DRAM_SIZE, MT_NON_CACHEABLE | MT_RW | MT_NS },
  • plat/xilinx/zynqmp/zynqmp_def.h :
    • Needed to add definitions for the above entry:
    • +#define DRAM_BASE_PA 0x00000000
      +#define DRAM_BASE_VA 0x00000000
      +#define DRAM_SIZE 0x80000000
  • plat/xilinx/zynqmp/include/platform_def.h :
    • This was one of the "obscure" changes needed, because the mmap_add_region() function in fact uses a global array, mmap[].  Hence, we must increase the values of MAX_MMAP_REGIONS and MAX_XLAT_TABLES by 1:
    • +#define MAX_MMAP_REGIONS 8
      +#define MAX_XLAT_TABLES 6

And with that, it works.

Regards,
Yu Fei

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