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Visitor heiko_haas
Registered: ‎01-28-2019

Zynq7000 ARM local CPU reset by Watchdog - CPU stopped



I've a bare-metal software application running on Zynq7000 ARM CPU0.


Usuallly the boot after POR jumps from BootROm to FSBL and runs the Application

Now I've enabled the Watchdog (local/private) AWDT of CPU.

In System Mode slcr.RS_AWDT_CTRL[CTRL0] == 0, a watchdog reset leads to a full system reset as expected.

However in "local Mode" slcr.RS_AWDT_CTRL[CTRL0] == 1, the CPU0 seems to be reset, but the application Software does not recover.

There seems to be some initailization parts that the FSBL performs that are missing in local CPU0 reset.

Any Ideas on this are welcome.





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Xilinx Employee
Xilinx Employee
Registered: ‎10-11-2011

Re: Zynq7000 ARM local CPU reset by Watchdog - CPU stopped

As far as I know the FSBL is not meant to re-run automatically after a CPU reset.

There's some manual work that need to be done to guarantee your variable are propoerly re-initialized for a fresh start.

Maybe somebody else in the community has dne that already.

Don’t forget to reply, kudo, and accept as solution.
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