10-21-2019 06:03 AM - edited 10-21-2019 06:04 AM
The DDS Compiler v6.0's Product guide (PG141) states that "3-bit to 26-bit signed output sample precision." is possible using this core. If I choose quadrature output option, the following graph can be seen on simulation screen(which is fine):
My question is , if I want to give those signals to an output through a DAC (for example, in my case i use PMODDA2) and if my DAC accepts unsigned numbers as an input, how can I obtain them correctly on my oscilloscope?
This is my oscilloscope screen :
10-21-2019 06:36 AM
My DDS compiler component:
aclk : IN STD_LOGIC;
m_axis_data_tvalid : OUT STD_LOGIC;
m_axis_data_tdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0)
And Its port map:
dds : dds_compiler_0 port map( aclk=>clk,m_axis_data_tvalid=>led1,
m_axis_data_tdata(31 downto 16) => temp_sin,
m_axis_data_tdata(15 downto 0) => temp_cos );
temp_sin & temp_cos signals hold values for the sinus and cosinus signals. However, they are represented in signed format. To feed my DAC's input i need unsigned format... simply converting from signed to un-signed does not work here...
10-21-2019 07:32 AM
You need to map the signed value 0x8000 to 0x0000. You need to map the signed value 0x0000 to 0x8000. You need to map the signed value 0x7fff to the value 0xffff. This can be accomplished by adding 0x8000 to every sample, then truncating back to 16 bits.
10-21-2019 02:37 PM