12-02-2020 03:34 PM
*Posting again since my original post seems to have disappeared*
Hello, I have a question regarding the FIR Compiler IP.
I have instantiated a FIR decimation filter. The parameters are:
Now, I have written a simple testbench to simulate the filter. In the example below you can see the waves when the filter is fed 100 cycles of sinusoidal waves. The last beat of data at the filter's input has the TLAST signal enabled.
If we look at the output we can see how it takes 65 clock cycles of input data before the data at the output begins to flow. The filter has 57 coefficients, which from college I think it means there would probably be a group delay of at least 56 cycles, but I guess there are extra pipeline stages inside the filter.
My question is, from the simuation I can see how the TLAST sample is also delayed 65 cycles, however, should I bee really using those last 65 cycles from the output data? or should I be discarding them? As far as I know, in order for the FIR filter to generate an output sample it must look back at the previous 65 samples of the input signal. Once the input data stops flowing, the filter no longer has those samples, the number of samples to multiply/average out inside the filter will decrease with every clock cycle, so when the TLAST at the output goes high, the FIR filter has no valid samples from the last 65 clock cycles....
I don't even understand how the FIR compiler is doing this internally... is it using some fixed value (zero?) for the samples it does not have any more?
Again, my question is, should I use those samples flowig out of the FIR filter after the input data has stopped flowing?
12-24-2020 12:58 AM
The implement of FIR filter is simple, it's built with formula below. That said, whether the last output is needed is really determined by your application.