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Participant krunal_h_bhavsar
Participant
9,397 Views
Registered: ‎09-21-2007

Define I/O using System Generator

Hello,
           I have done with HW co-simulation. I have developed floating point circular convolution and it works perfectly well.. Now my task is to give the signals from outer world rather than computer or matlab.  Actually I have used three blocks from Core Generator and other for controlling it....But now how can I give signals from external world or how can I define I/Os. Please help me.........
 
Regards,
Krunal
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5 Replies
Xilinx Employee
Xilinx Employee
9,379 Views
Registered: ‎08-07-2007

Re: Define I/O using System Generator

If you wish to interact with external I/O during HW co-simulation take a look at the System Generator Help section titled "Using FPGA Hardware in the Loop > Board Specific I/O Ports".  Here you can learn how to create "Non-memory mapped" Gateway ports for generation to a hardware co-simulation target that are routed to external IO.

If you want to use external I/O on a board outside of System Generator then you need to set the specific pin LOCation constraints for your Gateways appropriately.  For details on this take a look at the System Generator Help section on Gateway In and Gateway Out blocks in the Blockset Reference pages.

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Participant krunal_h_bhavsar
Participant
9,363 Views
Registered: ‎09-21-2007

Re: Define I/O using System Generator

Thank you sir,
          I have tried with it. I have made simple adder of 2 bit and with sys gen's help I have created other non-memory maped I/O.The I/O I have defined are switches and LEDs on board. I  am using Spartan 3E starter board. And I have also created specific gateways from that but still switches and LEDs are bit working. Co-simulation works properly but my switches and LEDs are not working. 
I am attaching my simulink file for you, Please give me help how to do this.........
           Once again thank you very much. Your reply is very precious.....
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Xilinx Employee
Xilinx Employee
9,352 Views
Registered: ‎08-07-2007

Re: Define I/O using System Generator

I suggest confirming your gateways are in fact non-memory mapped ports (there should be a "nmm" printed on them).  Next confirm the proper pin LOCations for your switches and LEDs.  Also you could confirm that signals are routed to the IO of interest by using FPGA Editor to view the placed and routed .ncd file of your hardware co-sim project.  Finally, be sure you are toggling your LEDs at a rate slow enought that it is visible.  If you have questions on how to confirm this please open a case with Xilinx Support:
http://www.xilinx.com/support/clearexpress/websupport.htm
Participant krunal_h_bhavsar
Participant
9,341 Views
Registered: ‎09-21-2007

Re: Define I/O using System Generator

Thanks again for your reply,
               I have generated gateway 'nmm' written on it by the .m file which is generated from the hw co-sim folder. But though it now works. Even I have checked LED and switch address and I can't find where the .ncd file is........... I am attaching my simulink file for you. I have tried to open webcase but it deny it. So please help me for define it. Actually I think I am very near to it but something is missing so please help me for that..............
 
              Thank you, Please help me your information is very useful for me.
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Newbie marfog
Newbie
4,114 Views
Registered: ‎04-14-2010

Re: Define I/O using System Generator

Hi all,

 

my problem seems very similar: on my ML506 board, I tried to connect a 8 bit ports to a point-to-point Ethernet co-sim model  to output a byte word during the simulation.

 

So, on the top level,  I have instantiated a BlackBox containing a VHDL file realizing a latch port and I routed this to a Gateway Out, defining on it the FPGA pad mapping.

 

Unfortunately I don't see any my new signals on .ucf file produced.

 

Following this thread I understood I should define the Gateway Out as Non Memory Mapped: my problem it's I don't know how to make this. I found the function

 

xlSetNonMemMap, but I don't know how to use it.

 

I hope some suggestions.

 

Thank you.

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