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Newbie vahishta31
Registered: ‎09-12-2018

Doing signal processing on a data stream causes time delay


I am trying to do some signal processing on a received radar signal. The radar is a continuous wave radar and an the FPGA is controlling its operation. As the first step of DSP, I want to average the stream, of data coming continuously through ADC in intervals marked by an internal trigger. For that I have made an IP state machine  which writes and reads simultaneously to a FIFO buffer to add the data to it and in the last interval it sends the averaged data to master AXIS port to be written on the memory. I get always really big values for the time slack and it doesn't work. apparently the delay is caused in between the FIFO and the M_AXIS port. I tried to implement it with a BRAM as well and I got the same result. Does anyone have a better idea as how to do the averaging real time?


thank you

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