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shaikon
Voyager
Voyager
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Registered: ‎04-12-2012

FIR Compiler - inconsistencies between documentation and IP

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Hello,

From reading this document :
https://www.xilinx.com/support/documentation/ip_documentation/fir_compiler/v7_2/pg149-fir-compiler.pdf

I learn that the FIR compiler supports more the one filter architectures.
However, when I look inside the core I find only "Systolic Multiply Accumulate".

Why is that ?

one_option_only.png
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vkanchan
Xilinx Employee
Xilinx Employee
424 Views
Registered: ‎09-18-2018

Hi @shaikon ,

PG149 states that Systolic MAC architecture exploits Filter symmetry while the Transpose MAC architecture does not. If the "coefficient structure" option  in "Implementation Tab" is set to symmetric or if inferred as symmetric, then only Systolic MAC architecture is present.

If the coefficient structure is set to Non-symmetric or inferred as Non-symmetric, then Transpose MAC architecture is also available.

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vkanchan
Xilinx Employee
Xilinx Employee
425 Views
Registered: ‎09-18-2018

Hi @shaikon ,

PG149 states that Systolic MAC architecture exploits Filter symmetry while the Transpose MAC architecture does not. If the "coefficient structure" option  in "Implementation Tab" is set to symmetric or if inferred as symmetric, then only Systolic MAC architecture is present.

If the coefficient structure is set to Non-symmetric or inferred as Non-symmetric, then Transpose MAC architecture is also available.

View solution in original post