05-20-2018 03:20 PM
I am designing a controller using "system generator" and I hard code it on fpga using USB JTAG on the zedboard.
What I want to do is to implement the rest of the design in matlab which is not in system generator in the ARM cheap on the zedboard.
If it is possible please guide me through a tutorial which shows the procedure.
05-28-2018 12:54 PM
I have already mentioned in my previous post that I am running different models in sysgen so I did not need to know how it works!!
What I need to know is whether I can give a portion of the task to "ARM" after I generate the sysgen blocks and if there is any way to do it in system generator.