Issue in HDL Simulation and FPGA Build with dSPACE toolchain
I have an issue simulating and building an FPGA application using dSPACE toolchain. I'm actually using Vivado 2016.4, Matlab R2016b, and dSPACE 2017-B.
I tried to run the demo from dSPACE coming with the RTI FPGA Programming Blockset, it passes the Timing Analysis, but when I try tu run HDL simulation or FPGA build Matlab shows me the following messages:
RTI Build Error The HDL Simulation of the Xilinx Sytem Generator HDL output failed.
The Synthesis of the Xilinx System Generator output failed.
The log file doesn't say anything about errors or warnings.