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Participant
Participant
11,439 Views
Registered: ‎08-31-2007

ModelSim error when using SystemGenerator

I am using SystemGenerator 9.2, ModelSim XE III 6.2g, and Matlab 2007a.  When I try to simulate my black box vhdl code, it works in ISE but it won't work with ModelSim.  I get this error:


# ** Error: (vcom-11) Could not find C:\Modeltech_xe_starter\win32xoem/../xilinx/vhdl/xilinxcorelib.fifo_generator_v4_1.
# ** Error: filtertest_cosim.vhd(1874): (vcom-1195) Cannot find expanded name: 'xilinxcorelib.fifo_generator_v4_1'.
# ** Error: filtertest_cosim.vhd(1875): (vcom-1105) 'xilinxcorelib' is not an entity.
# ** Error: filtertest_cosim.vhd(1932): Configuration specification requires an entity aspect.
# ** Error: filtertest_cosim.vhd(1948): VHDL Compiler exiting
# ** Error: C:/Modeltech_xe_starter/win32xoem/vcom failed.

I performed the tutorial exercises and did not get this type of error with the ModelSim demo.  I am new to the SystemGenerator software, so there may be a configuration setting I have not performed, or I have not properly added files in the black box's m-file.  I do have all the EDIFs added following the same heirarchy the demos followed.  I am wondering where my mistake may lie.  Thanks.
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Xilinx Employee
Xilinx Employee
11,364 Views
Registered: ‎08-01-2007

It sounds like you don't have the ModelSim IP Upate libraries.  When you upadate your IP or add a new Service Pack, you also have to update the ModelSim XE libraries.

You should be able to get the latest libraries from the download center.

You also might not beware that adding an Async FIFO can be done using the Share Memories.  There are tutorials that ship with System Generator that talk about using the shared memories.  I would recommend doing this, rather than adding an Async FIFO via a Blackbox.

If you are doing a Sync FIFO, then there is already a FIFO block in System Generator.
Chris
Versal ACAP: AI Engines | Embedded SW Support

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Participant
Participant
11,361 Views
Registered: ‎08-31-2007

This is originally a project built in ISE and piece-wise tested, and breaking out the coregen portions would require more work than to black box the entire top level and include all the files.  SysGen is being used to make testing easier since the test data was originally based in Matlab.  If future designs begin in SysGen, that is definitely useful information.  Thank you. 
I will try updating the IPs in ModelSim.  Thanks.
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Participant
Participant
11,358 Views
Registered: ‎08-31-2007

That was exactly the problem.  Thanks.  Now I'll know that there are two more file sets to download every update!
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